METHOD AND SYSTEM FOR AN EXTENDED RANGE ETHERNET LINE CODE

• US 20080069144A1
• Filed: 03/15/2007
• Published: 03/20/2008
• Est. Priority Date: 09/20/2006
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Powell, Scott, Chang, Kuang-Chou, Chen, Yencheng, Yu, Xinhua
• Granted Patent: US 7,835,389 B2
• Time in Patent Office: Days
• US Class Current: 370/476
• CPC Class Codes: H04L 12/40136 Nodes adapting their rate to the physical link properties LAN switches H04L49/351
• CPC Class Codes: H04L 25/4908 using mBnB codes
• CPC Class Codes: H04L 25/4923 using ternary codes H04L25/4927 takes precedence
• CPC Class Codes: H04L 5/1423 for simultaneous baseband signals

Abstract

Aspects of a method and system for an extended range Ethernet line code are provided. A local PHY may enable converting Ethernet media independent interface (MII) data from a 4-bit packet stream to a 3-bit packet stream. The 3-bit packet stream may be mapped to first and second ternary bits streams, for example, for communication to a remote PHY utilizing PAM-3 over one or more twisted-pair wires. The 3-bit packet stream may be scrambled and/or aligned before mapping. When a single twisted-pair wire is available, the local PHY may multiplex the ternary bits streams into a single stream. Start-stream delimiters (SSD) may be inserted before the ternary bits streams and end-stream delimiters may be inserted after the ternary bits streams. Idle signals may be inserted after the ESDs and before the start of the next frame of MII data.

Claims

1. A method for wired communication, the method comprising:

converting Ethernet media independent interface (MII) data in a local PHY from a 4-bit packet stream to a 3-bit packet stream; and

mapping said 3-bit packet stream of MII data to one or more ternary bits streams for communication to a remote PHY over one or more twisted-pair wires.

2. The method according to claim 1, wherein said one or more ternary bits streams comprises a first ternary bit stream and a second ternary bit stream.

3. The method according to claim 1, comprising communicating to said remote PHY utilizing PAM-3.

4. The method according to claim 1, comprising scrambling said 3-bit packet stream before said mapping.

5. The method according to claim 1, comprising aligning said 3-bit packet stream during said mapping.

6. The method according to claim 1, comprising multiplexing said one or more ternary bits streams into a single stream when a single twisted-pair wire is available,

7. The method according to claim 1, comprising inserting start-stream delimiters (SSD) before said one or more ternary bits streams.

8. The method according to claim 1, comprising inserting end-stream delimiters (ESD) after said one or more ternary bits streams.

9. The method according to claim 8, comprising inserting idle signals after said inserted ESD.

10. A machine-readable storage having stored thereon, a computer program having at least one code section for wired communication, the at least one code section being executable by a machine for causing the machine to perform steps comprising:

converting Ethernet media independent interface (MII) data in a local PHY from a 4-bit packet stream to a 3-bit packet stream; and

mapping said 3-bit packet stream of MII data to one or more ternary bits streams for communication to a remote PHY over one or more twisted-pair wires.

11. The machine-readable storage according to claim 10, wherein said one or more ternary bits streams comprises a first ternary bit stream and a second ternary bit stream.

12. The machine-readable storage according to claim 10, comprising code for communicating to said remote PHY utilizing PAM-3.

13. The machine-readable storage according to claim 10, comprising code for scrambling said 3-bit packet stream before said mapping.

14. The machine-readable storage according to claim 10, comprising code for aligning said 3-bit packet stream during said mapping.

15. The machine-readable storage according to claim 10, comprising code for multiplexing said one or more ternary bits streams into a single stream when a single twisted-pair wire is available.

16. The machine-readable storage according to claim 10, comprising code for inserting start-stream delimiters (SSD) before said one or more ternary bits streams.

17. The machine-readable storage according to claim 10, comprising code for inserting end-stream delimiters (ESD) after said one or more ternary bits streams.

18. The machine-readable storage according to claim 17, comprising code for inserting idle signals after said inserted ESD.

19. A system for wired communication, the system comprising:

a local PHY that enables converting Ethernet media independent interface (MII) data from a 4-bit packet stream to a 3-bit packet stream; and

said local PHY enables mapping of said 3-bit packet stream of MII data to one or more ternary bits streams for communication to a remote PHY over one or more twisted-pair wires.

20. The system according to claim 19, wherein said one or more ternary bits streams comprises a first ternary bit stream and a second ternary bit stream.

21. The system according to claim 19, wherein said local PHY enables communication to said remote PHY utilizing PAM-3.

22. The system according to claim 19, wherein said local PHY enables scrambling of said 3-bit packet stream before said mapping.

23. The system according to claim 19, wherein said local PHY enables aligning of said 3-bit packet stream during said mapping.

24. The system according to claim 19, wherein when a single twisted-pair wire is available, said local PHY enables multiplexing of said one or more ternary bits streams into a single stream.

25. The system according to claim 19, comprising inserting start-stream delimiters (SSD) before said one or more ternary bits streams.

26. The system according to claim 19, comprising inserting end-stream delimiters (ESD) after said one or more ternary bits streams.

27. The system according to claim 26, comprising inserting idle signals after said inserted ESD.