Low Power Dual Processor Architecture for Multi Mode Devices

• US 20080072014A1
• Filed: 11/29/2007
• Published: 03/20/2008
• Est. Priority Date: 08/27/2002
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Ludwin, Albert, Krishnan, Ranganathan, Gardner, William
• Granted Patent: US 8,208,972 B2
• Time in Patent Office: Days
• US Class Current: 712/43
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: H04W 52/028 switching on or off only a part of the equipment circuit blocks
• CPC Class Codes: H04W 52/0287 changing the clock frequency of a controller in the equipment
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A mobile computing device with multiple modes, for example, wireless communication and personal computing, has an application processor and a communication processor. In the computing mode, the application processor is the master processor. In the communication mode, the application processor is deenergized to conserve battery power, with the communication processor functioning as the master processor by accessing the device'"'"'s peripheral bus using the memory interface of the communication processor.

Claims

1. A multi mode mobile device configured to operate in a computing mode or a communication mode, comprising:

a battery;

an application processor configured to execute at least one application in the application mode, the application processor being powered at least in part by the battery;

a communication processor configured to facilitate wireless communication in the communication mode, the communication processor being powered at least in part by the battery;

wherein the application processor functions as a master processor and the communication processor functions as a peripheral processor when the device is in the computing mode; and

wherein the application processor is de-energized when the device is in the communication mode to enable the communication processor to function as the master process.

2. The device of claim 1, wherein the application processor is associated with a processor local bus (PLB), the device further comprising a PLB bridge processor configured to enable the communication processor to function as the master processor when the device is in the communication mode and to enable the communication processor to function as a peripheral processor when the device is in the computing mode.

3. The device of claim 2, wherein the communication processor is associated with a memory bus communicating with one or more memory devices, and wherein the PLB bridge processor is configured to bridge the memory bus to the PLB.

4. The device of claim 3, further comprising at least one peripheral hardware component connected to the PLB.

5. The device of claim 4, wherein the communication processor is further configured to accesses said at least one peripheral hardware component when the device is in the communication mode.

6. The device of claim 4, wherein said at least one peripheral hardware component includes at least one of a touch panel controller and a storage interface.

7. A method of operating a multi mode mobile device having a computing mode and a communication mode, comprising:

powering application processor and a communication processor at least in part by a battery;

executing at least one application with the application processor when the device is in the computing mode, wherein the application processor functions as a master processor and the communication processor functions as a peripheral processor when the device is in the computing mode;

de-energizing the application processor when the device is in the communication mode to enable the communication processor to function as the master processor;

facilitating wireless communication with the communication processor when the device is in the communication mode.

8. The method of claim 7, wherein the application processor is associated with a processor local bus (PLB), the method further comprising using a PLB bridge processor to enable the communication processor to function as the master processor and the communication processor to function as a peripheral processor when the device is in the computing mode.

9. The method of claim 8, wherein the communication processor is associated with a memory bus communicating with one or more memory devices, the method further comprising using the PLB bridge processor to bridge the memory bus to the PLB.

10. The method of claim 9, further comprising at least one peripheral hardware component connected to the PLB.

11. The method of claim 10, further comprising using the communication processor to accesses said at least one peripheral hardware component when the device is in the communication mode.

12. The method of claim 10, wherein said at least one peripheral hardware component includes at least one of a touch panel controller and a storage interface.

13. A multi mode mobile device configured to operate in a computing mode or a communication mode, comprising:

a battery;

application processing means for executing at least one application when the device is in the computing mode, the application processing means being powered at least in part by the battery;

communication processing means for facilitating wireless communication when the device is in the communication mode, the communication processing means being powered at least in part by the battery;

wherein the application processing means functions as a master processor and the communication processing means functions as a peripheral processor when the device is in the computing mode; and

wherein the application processing means is de-energized when the device is in the communication mode to enable the communication processing means to function as the master processor.

14. The device of claim 13, wherein the application processing means is associated with a processor local bus (PLB), the device further comprising a PLB bridge processing means for enabling the communication processing means to function as the master processor and the communication processing means to function as a peripheral processor when the device is in the computing mode.

15. The device of claim 14, wherein the communication processing means is associated with a memory bus communicating with one or more memory devices, and wherein the PLB bridge processing means comprises means for bridging the memory bus to the PLB.

16. The device of claim 15, further comprising at least one peripheral hardware component connected to the PLB.

17. The device of claim 16, wherein the communication processing means comprises means for accessing said at least one peripheral hardware component when the device is in the communication mode.

18. The device of claim 16, wherein said at least one peripheral hardware component includes at least one of a touch panel controller and a storage interface.