THIN FILMS AND METHODS OF MAKING THEM

• US 20080073645A1
• Filed: 09/12/2007
• Published: 03/27/2008
• Est. Priority Date: 02/12/2001
• Status: Active Grant

• Current Assignee: ASM IP Holding B.V. (ASM International NV)
• Original Assignee: ASM America Incorporated (ASM International NV)
• Inventors: Todd, Michael, Raaijmakers, Ivo
• Granted Patent: US 7,893,433 B2
• Time in Patent Office: Days
• US Class Current: 257/52
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: C23C 16/0272 Deposition of sub-layers, e.g. to promote the adhesion of the main coating
• CPC Class Codes: C23C 16/22 characterised by the deposition of inorganic material, other than metallic material
• CPC Class Codes: C23C 16/24 Deposition of silicon only
• CPC Class Codes: C23C 16/30 Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
• CPC Class Codes: C23C 16/308 Oxynitrides
• CPC Class Codes: C23C 16/325 Silicon carbide
• CPC Class Codes: C23C 16/345 Silicon nitride
• CPC Class Codes: C23C 16/36 Carbonitrides
• CPC Class Codes: C23C 16/56 After-treatment
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 29/06 Silicon
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0251 Graded layers
• CPC Class Codes: H01L 21/02529 : Silicon carbide
• CPC Class Codes: H01L 21/02532 : Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02576 : N-type
• CPC Class Codes: H01L 21/02579 : P-type
• CPC Class Codes: H01L 21/02592 : amorphous
• CPC Class Codes: H01L 21/02595 : polycrystalline
• CPC Class Codes: H01L 21/02598 : monocrystalline
• CPC Class Codes: H01L 21/0262 : Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02667 : Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/2257 : the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
• CPC Class Codes: H01L 21/28035 : the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities H01L21/28105 takes precedence
• CPC Class Codes: H01L 21/28044 : the conductor comprising at least another non-silicon conductive layer
• CPC Class Codes: H01L 21/28194 : by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28525 : the conductive layers comprising semiconducting material H01L21/28518, H01L21/28537 take precedence
• CPC Class Codes: H01L 21/28556 : by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/3185 : of siliconnitrides
• CPC Class Codes: H01L 21/32055 : Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
• CPC Class Codes: H01L 28/84 : being a rough surface, e.g. using hemispherical grains
• CPC Class Codes: H01L 29/127 : Quantum box structures
• CPC Class Codes: H01L 29/51 : Insulating materials associated therewith for MIS structures on thin film semiconductor H01L29/4908
• CPC Class Codes: H01L 29/517 : the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 : the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66181 : Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
• CPC Class Codes: H01L 29/66242 : Heterojunction transistors [HBT] with an active layer made of a group 13/15 material H01L29/66318
• CPC Class Codes: H01L 31/1804 : comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/182 : Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
• CPC Class Codes: H01L 31/202 : including only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/546 : Polycrystalline silicon PV cells
• CPC Class Codes: Y02E 10/547 : Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product
• CPC Class Codes: Y10S 438/933 : Germanium or silicon or Ge-Si on III-V

Abstract

Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC'"'"'s), gate electrodes and diffusion sources.

Claims

1. An integrated circuit comprising a continuous amorphous Si-containing film having a thickness that is 15 Å

or greater and that is 150 Å

or less, a surface area of about one square micron or greater, and a thickness non-uniformity of about 10% or less for a mean film thickness in the range of 100 Å

to 150 Å

, a thickness non-uniformity of about 15% or less for a mean film thickness in the range of 50 Å

to 99 Å

, and a thickness non-uniformity of about 20% or less for a mean film thickness of less than 50 Å

.

2. The integrated circuit of claim 1, further comprising a dielectric material having a surface in contact with the Si-containing film, wherein the surface in contact has an area of about 0.5 square micron or greater.

3. The integrated circuit of claim 2, wherein the dielectric material is selected from the group consisting of silicon oxide, metal oxide, metal silicate, silicon oxynitride and silicon nitride.

4. The integrated circuit of claim 1, wherein the Si-containing film further comprises a dopant element selected from the group consisting of boron, arsenic, and phosphorous.

5. The integrated circuit of claim 4, wherein the dopant element is uniformly distributed throughout the Si-containing film.

6. The integrated circuit of claim 1, wherein the Si-containing layer further comprises germanium.

7. The integrated circuit of claim 1, wherein the Si-containing layer further comprises carbon.

8. The integrated circuit of claim 1, wherein the Si-containing film has a surface roughness of about 5 Å

rms or less.

9. The integrated circuit of claim 1, wherein the Si-containing film has a surface roughness of about 3 Å

rms or less.

10. The integrated circuit of claim 1, wherein the Si-containing film has a surface roughness of about 2 Å

rms or less.

11. The integrated circuit of claim 1, further comprising a non-single crystal material having a surface in contact with the Si-containing film.

12. The integrated circuit of claim 1, further comprising a doped Si-containing layer having a surface in contact with the Si-containing film.

13. The integrated circuit of claim 1, further comprising a trench in contact with the Si-containing film.

14. The integrated circuit of claim 1, wherein the Si-containing film is a diffusion layer.

15. The integrated circuit of claim 1, wherein the Si-containing film is a Si—

N film.

16. The integrated circuit of claim 15, wherein the Si—

N film has a hydrogen content that is less than about 4 atomic %.

17. A transistor gate electrode comprising a semiconductor substrate, a dielectric layer over the semiconductor substrate, a continuous amorphous Si-containing film having a thickness of about 125 Å

or less and a thickness non-uniformity of about 20% or less, and a doped semiconductor layer over the continuous amorphous Si-containing film.

18. The transistor gate electrode of claim 17, wherein the doped semiconductor layer is selected from the group consisting of Si—

Ge, Si—

C, and Si—

Ge—

C.

19. The transistor gate electrode of claim 17, wherein the amorphous Si-containing film has a surface roughness of about 5 Å

rms or less.

20. The transistor gate electrode of claim 17, wherein the Si-containing film has a thickness of about 100 Å

or less.

21. The transistor gate electrode of claim 17, wherein the Si-containing film has a thickness of about 80 Å

or less.

22. The transistor gate electrode of claim 17, further comprising a dielectric material having a surface in contact with the Si-containing film, wherein the surface in contact has an area of about 5 square microns or greater.

23. The transistor gate electrode of claim 17, further comprising a dielectric material having a surface in contact with the Si-containing film, wherein the surface in contact has an area of about 10 square microns or greater.

24. The transistor gate electrode of claim 17, wherein the Si-containing film is a conformal coating.

25. The transistor gate electrode of claim 17, further comprising a non-single crystal layer having a surface in contact with the Si-containing film, wherein the non-single crystal layer is selected from the group consisting of silicon oxide, metal oxide, metal silicate, silicon oxynitride and silicon nitride.