Protection circuit for power management semiconductor devices and power converter having the protection circuit
First Claim
1. A protection circuit for power management semiconductor devices having a collector, a gate, and an emitter, the circuit comprising:
- a first comparator which detects a collector voltage of said power management semiconductor device to output a fist detection signal when the detected collector voltage exceeds a first reference voltage;
a second comparator which detects a gate voltage of said power management semiconductor device to output a second detection signal, when the detected gate signal exceeds a second reference voltage which is a minimum gate voltage for feeding a rated power to said power management semiconductor device or over, and less than a line power voltage of a drive circuit for outputting a drive signal that drives said power management semiconductor device;
logic means for outputting a protection start signal when both the first and second detection signals are being outputted; and
gate voltage reduction means for reducing said gate voltage in accordance with the protection start signal from said logic means.
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Accused Products
Abstract
A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.
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Citations
2 Claims
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1. A protection circuit for power management semiconductor devices having a collector, a gate, and an emitter, the circuit comprising:
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a first comparator which detects a collector voltage of said power management semiconductor device to output a fist detection signal when the detected collector voltage exceeds a first reference voltage;
a second comparator which detects a gate voltage of said power management semiconductor device to output a second detection signal, when the detected gate signal exceeds a second reference voltage which is a minimum gate voltage for feeding a rated power to said power management semiconductor device or over, and less than a line power voltage of a drive circuit for outputting a drive signal that drives said power management semiconductor device;
logic means for outputting a protection start signal when both the first and second detection signals are being outputted; and
gate voltage reduction means for reducing said gate voltage in accordance with the protection start signal from said logic means.
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2-13. -13. (canceled)
Specification