Network Clock Synchronization Timestamp

• US 20080075120A1
• Filed: 04/16/2007
• Published: 03/27/2008
• Est. Priority Date: 09/25/2006
• Status: Active Grant

• Current Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Inventors: Fourcand, Serge Francois
• Granted Patent: US 8,494,009 B2
• Time in Patent Office: Days
• US Class Current: 370/503
• CPC Class Codes: H04J 3/0602 Systems characterised by the synchronising information used
• CPC Class Codes: H04J 3/065 using timestamps
• CPC Class Codes: H04J 3/0667 Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays arrangements for monitoring round trip delays in packet switching networks H04L43/0864

Abstract

A network component comprising at least one processor configured to promote transmission of a frame from a first node to a second node, the frame comprising a first clock synchronization data, and a first frame count, wherein the first clock synchronization data and the first frame count are used to synchronize a first clock in the first node and a second clock in the second node. Also disclosed is a method comprising processing a frame comprising an Ethernet control symbol that delineates the beginning of the frame, a first clock synchronization data, a first frame count, and a second clock synchronization data. Included is an Ethernet node comprising at least one processor configured to synchronize a clock using a clock synchronization data comprising a first timestamp, a first frame count, a second timestamp, and a second frame count.

Claims

1. A network component comprising:

at least one processor configured to promote transmission of a frame from a first node to a second node, the frame comprising;

a first clock synchronization data; and

a first frame count,

wherein the first clock synchronization data and the first frame count are used to synchronize a first clock in the first node and a second clock in the second node.

2. The component of claim 1 wherein the frame is one of a plurality of frames with similar data structures, and wherein the frames are transmitted on intervals of about 125 microseconds.

3. The component of claim 1 wherein the clock synchronization data is about four octets long and comprises a timestamp that is about three octets long and a control field that is about one octet long.

4. The component of claim 1 wherein the clock synchronization data has a resolution of about 0.01 nanoseconds.

5. The component of claim 1 wherein the clock synchronization data has a range of no more than about 168 microseconds.

6. The component of claim 1 wherein the clock synchronization data has a period of about 125 microseconds.

7. The component of claim 1 wherein the frame count is about three octets long and comprises a timestamp that is about two octets long and a control field that is about one octet long.

8. The component of claim 1 wherein the frame count has a resolution of about 125 microseconds.

9. The component of claim 1 wherein the frame count has a range of no more than about 8 seconds.

10. The component of claim 1 wherein the frame count has a period of about 125 microseconds.

11. A method comprising:

processing a frame comprising;

an Ethernet control symbol that delineates the beginning of the frame;

a first clock synchronization data;

a first frame count; and

a second clock synchronization data.

12. The method of claim 11 wherein the first clock synchronization data is associated with a transmission time of the frame.

13. The method of claim 12 wherein the second clock synchronization data is a transport delay between a first node and a second node.

14. The method of claim 12 wherein the second clock synchronization data is a downstream node delay.

15. The method of claim 11 wherein the frame interrupts an Ethernet packet.

16. The method of claim 15 wherein the Ethernet packet continues after the frame ends.

17. An Ethernet node comprising:

at least one processor configured to synchronize a clock using a clock synchronization data comprising;

a first timestamp;

a first frame count;

a second timestamp; and

a second frame count.

18. The node of claim 17 wherein the clock synchronization data is preceded by an Ethernet control symbol that delineates the start of a frame.

19. The node of claim 17 wherein the clock synchronization data is received about every 125 microseconds.

20. The node of claim 17:

wherein the first timestamp is associated with a transmission time of a frame comprising the clock synchronization data,

wherein the first frame count differentiates the frame from a plurality of other similar frames, and

wherein the second clock synchronization data is a transport delay between a first node and a second node or a downstream node delay.