POWER SEMICONDUCTOR ARRANGEMENT

• US 20080079145A1
• Filed: 09/28/2007
• Published: 04/03/2008
• Est. Priority Date: 09/28/2006
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Bayerer, Reinhold, Tschirbs, Roman
• Granted Patent: US 7,910,952 B2
• Time in Patent Office: Days
• US Class Current: 257/706
• CPC Class Codes: H01L 2023/4031 Packaged discrete devices, e.g. to-3 housings, diodes
• CPC Class Codes: H01L 2023/4056 heatsink to additional heatsink
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4846 with multiple bonds on the same bonding area
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/3735 Laminates or multilayers, e.g. direct bond copper ceramic substrates
• CPC Class Codes: H01L 23/4006 with bolts or screws
• CPC Class Codes: H01L 23/492 Bases or plates or solder therefor
• CPC Class Codes: H01L 24/33 of a plurality of layer connectors
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

One aspect relates to a power semiconductor arrangement includes a power semiconductor module which is mechanically connected to a heat sink. In order to improve the thermal cycling stability of the connection between a baseplate of the module and a circuit carrier connected thereto, recesses are provided in the baseplate. One aspect further relates to a power semiconductor module.

Claims

1. A semiconductor module comprising:

a circuit carrier having a first and a second surface;

a connecting layer having a first and a second surface, the first surface of the connecting layer coupled to the second surface of the circuit carrier;

a baseplate with a first surface, the first surface of the baseplate connected to the second surface of the connecting layer at a connecting area;

a fixing location in the baseplate for connecting the baseplate to a heat sink; and

a recess extending into the baseplate proceeding from the first surface of the baseplate, and arranged between the fixing location and the connecting area.

2. The semiconductor module of claim 1, wherein the distance between the recess and the connecting area is selected to reduce the mechanical stresses.

3. The semiconductor module of claim 1, wherein the distance between the fixing location and the connecting area is selected to reduce the thermomechanical stresses.

4. A semiconductor module comprising a baseplate and a circuit carrier, which is fixedly connected to the baseplate by means of a connecting layer, wherein the baseplate comprises:

a connecting area given by a common interface between the connecting layer and the baseplate;

a fixing location, by means of which the baseplate can be connected to a heat sink; and

a recess, which is arranged in a lateral direction between the fixing location and the connecting area and extends into the baseplate proceeding from that side of said baseplate which faces the circuit carrier.

5. The semiconductor module of claim 4, wherein the recess is arranged in the lateral direction between the fixing location and a location at which the connecting area comprises a radius of curvature of less than 10 mm.

6. The semiconductor module of claim 4, wherein the recess is formed as a continuous opening of the baseplate.

7. The semiconductor module of claim 4, wherein the recess is formed as a non-continuous trench of the baseplate.

8. The semiconductor module of claim 7, wherein the recess comprises a depth of at least 30% of the thickness of the baseplate.

9. The semiconductor module of claim 4, wherein the recess comprises a depth of at least 1 mm.

10. The semiconductor module of claim 4, wherein the recess comprises a width of 10% to 100% of the thickness of the baseplate.

11. The semiconductor module of claims 4, wherein the recess comprises a width of 0.5 mm to 5 mm.

12. The semiconductor module of claim 4, wherein the recess is arranged in ring-shapedly closed fashion around the connecting area.

13. The semiconductor module of claim 4, wherein the distance between the recess and the connecting area in the lateral direction is less than or equal to 3 mm.

14. The semiconductor module of claim 4, wherein the distance between the fixing location and the connecting area in the lateral direction is less than or equal to 3 mm.

15. The semiconductor module of claim 4, wherein the edge of the connecting area comprises at an edge point a radius of curvature that falls below a predetermined first minimum value, wherein the baseplate comprises a recess which is at least partly arranged outside the connecting area and which is arranged on a common straight line with the edge point and the center of curvature assigned to said edge point in the plan view of the front side of the baseplate.

16. The semiconductor module of claim 15, wherein the predetermined first minimum value is 0 mm to 10 mm.

17. The semiconductor module of claim 4, wherein the edge of the connecting area comprises at an edge point a radius of curvature that falls below a predetermined second minimum value, wherein, in the plan view of the front side of the baseplate the fixing location, preceding from a center of curvature corresponding to the radius of curvature, appears under an angular range arranged completely within the angular range under which the recess appears preceding from the center of curvature.

18. The semiconductor module of claim 17, in which the predetermined second minimum value is 0 mm to 10 mm.

19. The semiconductor module claim 4, wherein the fixing location is formed as a continuous opening of the baseplate.

20. The semiconductor module of claim 18, wherein the fixing location comprises an internal thread.

21. The semiconductor module of claim 4, wherein the fixing location is given by a location at which the baseplate is connected to a bolt in a releasable or non-releasable manner.

22. The semiconductor module of claim 4, wherein the fixing location is given by a location at which the baseplate comprises a projection formed as a fixing element.

23. An arrangement comprising:

a circuit carrier having a first and a second surface;

a connecting layer having a first and a second surface, the first surface of the connecting layer coupled to the second surface of the circuit carrier;

a baseplate with a first surface, the first surface of the baseplate connected to the second surface of the connecting layer at a connecting area;

a heat sink coupled to the baseplate;

means on the baseplate for connecting the baseplate to the heat sink; and

a recess extending into the baseplate proceeding from the first surface of said baseplate and adjacent the connecting area.

24. The semiconductor module of claim 23, wherein the distance between the recess and the connecting area is selected to reduce the mechanical stresses.