Intelligent probe chips/heads

• US 20080079450A1
• Filed: 10/24/2007
• Published: 04/03/2008
• Est. Priority Date: 06/24/2004
• Status: Abandoned Application

• Current Assignee: Novellus Development Co. LLC (Lam Research Corporation)
• Original Assignee: Novellus Development Co. LLC (Lam Research Corporation)
• Inventors: DiOrio, Mark, Dean, Vada
• Application Number:
  US11/977,698
• Publication Number:
  US 20080079450A1
• Time in Patent Office: Days
• US Class Current: 324/754
• CPC Class Codes: G01R 31/2886 Features relating to contacting the IC under test, e.g. probe heads; chucks G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06
• CPC Class Codes: G01R 31/31723 Hardware for routing the test signal within the device under test to the circuits to be tested, e.g. multiplexer for multiple core testing, accessing internal nodes routing the test signal to or from the device under test G01R31/31926
• CPC Class Codes: G01R 31/31905 Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
• CPC Class Codes: G11C 2029/5602 Interface to device under test
• CPC Class Codes: G11C 29/56 External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Abstract

An intelligent probe chip or probe head can include design-for-test (DFT) circuitry that would otherwise be required in a device being tested and/or implement testing functions so that less-expensive automated test equipment (ATE) can test the device. Further, the probe chip or probe head can generate high frequency signals, avoiding the need to transmit high frequency signals the longer distance from the ATE.

Claims

1. A test system comprising a probe chip that includes:

a substrate;

active test circuitry integrated in and on the substrate; and

probe tips on the substrate and connected to the active test circuitry, wherein

the active test circuitry generates an output signal on an least one of the probe tips, the output signal having a frequency higher than frequencies of any input signal to the probe chip.

2. The test system of claim 1, wherein the active circuitry comprises a transceiver that generates the output signal.

3. The system of claim 2, wherein the transceiver is selected from a group consisting of a XAUI, an Ethernet transceiver, and a MEMS controlled switching array.

4. The system of claim 1, wherein the probe tips have a pattern that matches a pattern of electrical contacts on a device being tested.

5. The system of claim 4, wherein the probe tips are sufficiently rigid that a pressure used when the probe tips contact the electrical contacts for testing deforms and planarizes tops of the electrical contacts.

6. The system of claim 1, further comprising automated test equipment that is electrically connected to the probe chip and provides the input signals to the probe chip.

7. The system of claim 6, wherein the automated test equipment controls the active circuitry to direct the active circuitry to communicate with a device under test at frequencies higher than the frequencies of the input signals.

8. The system of claim 1, wherein the probe chip further comprises passive circuitry that implements a space transformation from electrical connections of a probe interface board to electrical connections of a device being tested.

9. The system of claim 1, wherein the probe chip is a semiconductor device.

10. The system of claim 1, wherein the active test circuitry comprises a signal generator that controls a pattern of the output signal.

11. The system of claim 1, where in the active test circuitry comprises memory storing data for testing of devices.

12. The system of claim 1, wherein the active test circuitry comprises a processor and memory storing software that the processor executes to perform testing routines independently of the other equipment in the test system.

13. A probe head comprising:

a substrate;

probe tips attached to the substrate; and

active circuitry mounted on the substrate and electrically connected to the probe tips through the substrate, wherein the active circuitry generates an output signal an output signal on an least one of the probe tips, the output signal having a frequency higher than frequencies of any input signal to the probe head.

14. The probe head of claim 13, wherein the substrate comprises a printed circuit board.

15. The probe head of claim 13, further comprising a control circuit mounted on the substrate.

16. The probe head of claim 13, wherein the active circuitry comprises a transceiver.

17. The probe head of claim 13, wherein the active circuitry comprises a MEMS-controlled switching array.