High speed IO buffer
First Claim
Patent Images
1. An IO buffer for driving and receiving operations, the buffer comprising:
- a driver, comprising;
a first switch;
a first resistive element serially coupled to the first switch;
a second resistive element coupled to the first resistive element via an output node; and
a second switch serially coupled to the second resistive element; and
a receiver, comprising;
a third switch;
a third resistive element serially coupled to the third switch;
a fourth resistive element coupled to the third resistive element via the output node; and
a fourth switch serially coupled to the fourth resistive element;
wherein in a receiving mode, at least one of the first and the second switches is turned on.
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Abstract
A bi-directional buffer is provided. The buffer includes a driver, a receiver, and a circuitry configured to select a driving mode in response to detecting a first condition and to select a receiving mode in response to detecting a second condition. The driving mode has a first impedance and the receiving mode has a second impedance. The second impedance is partially contributed from the driver.
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Citations
11 Claims
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1. An IO buffer for driving and receiving operations, the buffer comprising:
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a driver, comprising; a first switch; a first resistive element serially coupled to the first switch; a second resistive element coupled to the first resistive element via an output node; and a second switch serially coupled to the second resistive element; and a receiver, comprising; a third switch; a third resistive element serially coupled to the third switch; a fourth resistive element coupled to the third resistive element via the output node; and a fourth switch serially coupled to the fourth resistive element; wherein in a receiving mode, at least one of the first and the second switches is turned on. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
wherein in a driving mode, the N fifth switches and the N sixth switches are programmed to be selectively turned on.
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8. The buffer of claim 1, wherein the receiver further comprises:
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a programmable receiving array, comprising; M seventh switches, wherein M is a positive integer; M seventh resistive elements, each of the seventh resistive elements being serially coupled to one of the M seventh switches, respectively; M eighth resistive elements, each of the eighth resistive elements being coupled to one of the M seventh resistive elements via said output node, respectively; and M eighth switches, each of the eighth switches being serially coupled to one of the M eighth resistive elements; wherein in the receiving mode, the M seventh switches and the M eighth switches are programmed to be selectively turned on.
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9. A bi-directional buffer comprising:
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a driver; a receiver; and a circuitry configured to; select a driving mode in response to detecting a first condition, wherein the driving mode has a first impedance; and select a receiving mode in response to detecting a second condition, wherein the receiving mode has a second impedance and the second impedance is partially contributed from the driver. - View Dependent Claims (10, 11)
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Specification