DISPLAY DEVICE

• US 20080079685A1
• Filed: 09/11/2007
• Published: 04/03/2008
• Est. Priority Date: 09/29/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: MIYAKE, Hiroyuki, UMEZAKI, Atsushi
• Granted Patent: US 8,054,279 B2
• Time in Patent Office: Days
• US Class Current: 345/100
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2310/0205 Simultaneous scanning of several lines in flat panels
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/0291 Details of output amplifiers or buffers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2320/0646 Modulation of illumination source brightness and image signal correlated to each other
• CPC Class Codes: G09G 2320/0666 for control of colour parameters, e.g. colour temperature
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52

Abstract

To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.

Claims

1. A display device comprising a pixel and a driver circuit, the driver circuit includes:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor;

wherein a first electrode of the first transistor is electrically connected to a fourth wiring, and a second electrode of the first transistor is electrically connected to a third wiring;

wherein a first electrode of the second transistor is electrically connected to a seventh wiring, a second electrode of the second transistor is electrically connected to the third wiring, and a gate electrode of the second transistor is electrically connected to a fifth wiring;

wherein a first electrode of the third transistor is electrically connected to a sixth wiring, a second electrode of the third transistor is electrically connected to a gate electrode of the sixth transistor, and a gate electrode of the third transistor is electrically connected to the fourth wiring;

wherein a first electrode of the fourth transistor is electrically connected to the seventh wiring, a second electrode of the fourth transistor is electrically connected to the gate electrode of the sixth transistor, and a gate electrode of the fourth transistor is electrically connected to the fifth wiring;

wherein a first electrode of the fifth transistor is electrically connected to the sixth wiring, a second electrode of the fifth transistor is electrically connected to a gate electrode of the first transistor, and a gate electrode of the fifth transistor is electrically connected to a first wiring;

wherein a first electrode of the sixth transistor is electrically connected to the seventh wiring, and a second electrode of the sixth transistor is electrically connected to the gate electrode of the first transistor;

wherein a first electrode of the seventh transistor is electrically connected to the seventh wiring, a second electrode of the seventh transistor is electrically connected to the gate electrode of the first transistor, and a gate electrode of the seventh transistor is electrically connected to a second wiring; and

wherein a first electrode of the eighth transistor is electrically connected to the seventh wiring, a second electrode of the eighth transistor is electrically connected to the gate electrode of the sixth transistor, and a gate electrode of the eighth transistor is electrically connected to the gate electrode of the first transistor.

2. The display device according to claim 1, wherein the first transistor has the largest value of W/L (a ratio of a channel width W to a channel length L) among the first to eighth transistors.

3. The display device according to claim 1, wherein the value of W/L (the ratio of the channel width W to the channel length L) of the first transistor is twice to five times a value of W/L of the fifth transistor.

4. The display device according to claim 1, wherein a channel width L of the third transistor is longer than a channel width L of the eighth transistor.

5. The display device according to claim 1, wherein a capacitor is provided between the second electrode and the gate electrode of the first transistor.

6. The display device according to claim 1, wherein the first to eighth transistors are N-channel transistors.

7. The display device according to claim 1, wherein the first to eighth transistors are formed by using amorphous silicon.

19. An electronic device comprising the display device according to claim 1.

8. A display device comprising a pixel, a first driver circuit, and a second driver circuit,

wherein the first driver circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor;

wherein a first electrode of the first transistor is electrically connected to a fourth wiring, and a second electrode of the first transistor is electrically connected to a third wiring;

wherein a first electrode of the second transistor is electrically connected to a seventh wiring, a second electrode of the second transistor is electrically connected to the third wiring, and a gate electrode of the second transistor is electrically connected to a fifth wiring;

wherein a first electrode of the third transistor is electrically connected to a sixth wiring, a second electrode of the third transistor is electrically connected to a gate electrode of the sixth transistor, and a gate electrode of the third transistor is electrically connected to the fourth wiring;

wherein a first electrode of the fourth transistor is electrically connected to the seventh wiring, a second electrode of the fourth transistor is electrically connected to the gate electrode of the sixth transistor, and a gate electrode of the fourth transistor is electrically connected to the fifth wiring;

wherein a first electrode of the fifth transistor is electrically connected to the sixth wiring, a second electrode of the fifth transistor is electrically connected to a gate electrode of the first transistor, and a gate electrode of the fifth transistor is electrically connected to a first wiring;

wherein a first electrode of the sixth transistor is electrically connected to the seventh wiring, and a second electrode of the sixth transistor is electrically connected to the gate electrode of the first transistor;

wherein a first electrode of the seventh transistor is electrically connected to the seventh wiring, a second electrode of the seventh transistor is electrically connected to the gate electrode of the first transistor, and a gate electrode of the seventh transistor is electrically connected to a second wiring;

wherein a first electrode of the eighth transistor is electrically connected to the seventh wiring, a second electrode of the eighth transistor is electrically connected to the gate electrode of the sixth transistor, and a gate electrode of the eighth transistor is electrically connected to the gate electrode of the first transistor;

wherein the second driver circuit includes a ninth transistor, a tenth transistor, an eleventh transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, and a sixteenth transistor;

wherein a first electrode of the ninth transistor is electrically connected to an eleventh wiring, and a second electrode of the ninth transistor is electrically connected to a tenth wiring;

wherein a first electrode of the tenth transistor is electrically connected to a fourteenth wiring, a second electrode of the tenth transistor is electrically connected to the tenth wiring, and a gate electrode of the tenth transistor is electrically connected to a twelfth wiring;

wherein a first electrode of the eleventh transistor is electrically connected to a thirteenth wiring, a second electrode of the eleventh transistor is electrically connected to a gate electrode of the fourteenth transistor, and a gate electrode of the eleventh transistor is electrically connected to the eleventh wiring;

wherein a first electrode of the twelfth transistor is electrically connected to the fourteenth wiring, a second electrode of the twelfth transistor is electrically connected to the gate electrode of the fourteenth transistor, and a gate electrode of the twelfth transistor is electrically connected to the twelfth wiring;

wherein a first electrode of the thirteenth transistor is electrically connected to the thirteenth wiring, a second electrode of the thirteenth transistor is electrically connected to a gate electrode of the ninth transistor, and a gate electrode of the thirteenth transistor is electrically connected to an eighth wiring;

wherein a first electrode of the fourteenth transistor is electrically connected to the fourteenth wiring, and a second electrode of the fourteenth transistor is electrically connected to the gate electrode of the ninth transistor;

wherein a first electrode of the fifteenth transistor is electrically connected to the fourteenth wiring, a second electrode of the fifteenth transistor is electrically connected to the gate electrode of the ninth transistor, and a gate electrode of the fifteenth transistor is electrically connected to a ninth wiring; and

wherein a first electrode of the sixteenth transistor is electrically connected to the fourteenth wiring, a second electrode of the sixteenth transistor is electrically connected to the gate electrode of the fourteenth transistor, and a gate electrode of the sixteenth transistor is electrically connected to the gate electrode of the ninth transistor.

9. The display device according to claim 8, wherein the fourth wiring and the eleventh wiring are electrically connected, the fifth wiring and the twelfth wiring are electrically connected, the sixth wiring and the thirteenth wiring are electrically connected, and the seventh wiring and the fourteenth wiring are electrically connected.

10. The display device according to claim 9, wherein the fourth wiring and the eleventh wiring are the same wiring, the fifth wiring and the twelfth wiring are the same wiring, the sixth wiring and the thirteenth wiring are the same wiring, and the seventh wiring and the fourteenth wiring are the same wiring.

11. The display device according to claim 9, wherein the third wiring and the tenth wiring are electrically connected.

12. The display device according to claim 11, wherein the third wiring and the tenth wiring are the same wiring.

13. The display device according to claim 9, wherein the first transistor has the largest value of W/L (a ratio of a channel width W to a channel length L) among the first to eighth transistors, and the ninth transistor has the largest value of W/L (a ratio of a channel width W to a channel length L) among the ninth to sixteenth transistors.

14. The display device according to claim 9, wherein the value of W/L (the ratio of the channel width W to the channel length L) of the first transistor is twice to five times a value of W/L of the fifth transistor, and the value of W/L (the ratio of the channel width W to the channel length L) of the ninth transistor is twice to five times a value of W/L of the thirteenth transistor.

15. The display device according to claim 9, wherein a channel width L of the third transistor is longer than a channel width L of the eighth transistor, and wherein a channel width L of the eleventh transistor is longer than a channel width L of the sixteenth transistor.

16. The display device according to claim 9, wherein a capacitor is provided between the second electrode and the gate electrode of the first transistor, and a capacitor is provided between the second electrode and the gate electrode of the ninth transistor.

17. The display device according to claim 9, wherein the first to sixteenth transistors are N-channel transistors.

18. The display device according to claim 9, wherein the first to sixteenth transistors use amorphous silicon as semiconductor layers.

20. An electronic device comprising the display device according to claim 8.