RECTIFIER CIRCUIT AND RADIO COMMUNICATION DEVICE USING THE SAME

• US 20080080214A1
• Filed: 03/16/2007
• Published: 04/03/2008
• Est. Priority Date: 09/28/2006
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Otaka, Shoji, Umeda, Toshiyuki
• Granted Patent: US 7,843,709 B2
• Time in Patent Office: Days
• US Class Current: 363/37
• CPC Class Codes: H02J 50/10 using inductive coupling
• CPC Class Codes: H02J 50/20 using microwaves or radio frequency waves
• CPC Class Codes: H02M 7/103 Containing passive elements (capacitively coupled) which are ordered in cascade on one source
• CPC Class Codes: H02M 7/217 using semiconductor devices only

Abstract

A rectifier circuit includes an input terminal that receives an alternating-current signal, a first rectifier circuit that generates a first direct-current voltage from the alternating-current signal, a bias-voltage generating circuit that generates a bias voltage from the first direct-current voltage, and a second rectifier circuit that generates a second direct-current voltage from the alternating-current signal biased with the bias voltage.

Claims

1. A rectifier circuit comprising:

an input terminal that receives an alternating-current signal;

a first rectifier circuit that generates a first direct-current voltage from the alternating-current signal;

a bias-voltage generating circuit that generates a bias voltage from the first direct-current voltage; and

a second rectifier circuit that generates a second direct-current voltage from the alternating-current signal biased with the bias voltage.

2. The circuit according to claim 1, wherein the second rectifier circuit includes a metal-oxide-semiconductor (MOS) transistor, the bias voltage being applied to a gate of the MOS transistor, the alternating-current signal being input to a drain of the MOS transistor.

3. The circuit according to claim 2, further comprising a pulse generating circuit that is driven by the first direct-current voltage and generates a pulse signal, wherein

the second rectifier circuit includes a capacitor that is connected to between the gate and the drain of the MOS transistor, and

the bias voltage is intermittently applied to the capacitor depending on the pulse signal.

4. The circuit according to claim 1, further comprising a pulse generating circuit that is driven by the first direct-current voltage and generates a pulse signal, wherein

the bias-voltage generating circuit includes a MOS transistor in which a gate and a drain are short-circuited and a current source that generates a direct current from the first direct-current voltage, and intermittently supplies the direct current to the drain depending on the pulse signal, and outputs a voltage between a source and the drain of the MOS transistor as the bias voltage.

5. The circuit according to claim 1, further comprising a pulse generating circuit that is driven by the first direct-current voltage and generates a pulse signal, wherein

the second rectifier circuit includes a first MOS transistor, the bias voltage being applied to a gate of the first MOS transistor, the alternating-current signal being input to a drain of the first MOS transistor, and

the bias-voltage generating circuit includes a second MOS transistor that is designed in the same manner as the first MOS transistor, a gate and a drain of the second MOS transistor being short-circuited.

6. The circuit according to claim 3, further comprising a determining circuit that outputs an ON signal when the bias voltage coincides with a voltage between both ends of the capacitor, wherein

the second rectifier circuit includes a switch that is turned ON to drive the second rectifier circuit only when receiving the ON signal.

7. The circuit according to claim 2, wherein the first rectifier circuit includes a MOS transistor that rectifies the alternating-current signal, a threshold voltage of the MOS transistor in the first rectifier circuit being lower than a threshold voltage of the MOS transistor in the second rectifier circuit.

8. A radio communication device comprising:

a rectifier circuit that includes

a first rectifier circuit that generates a first direct-current voltage from an alternating-current signal;

a bias-voltage generating circuit that generates a bias voltage from the first direct-current voltage; and

a second rectifier circuit that generates a second direct-current voltage from the alternating-current signal biased with the bias voltage;

an antenna that generates the alternating-current signal; and

a signal processing circuit that receives the second direct-current voltage as a power supply voltage and demodulates the second direct-current voltage thereby obtaining a communication signal.

9. The device according to claim 8, wherein the second rectifier circuit includes a metal-oxide-semiconductor (MOS) transistor, the bias voltage being applied to a gate of the MOS transistor, the alternating-current signal being input to a drain of the MOS transistor.

10. The device according to claim 9, further comprising a pulse generating circuit that is driven by the first direct-current voltage and generates a pulse signal, wherein

the second rectifier circuit includes a capacitor that is connected to between the gate and the drain of the MOS transistor, and

the bias voltage is intermittently applied to the capacitor depending on the pulse signal.

11. The device according to claim 8, further comprising a pulse generating circuit that is driven by the first direct-current voltage and generates a pulse signal, wherein

the bias-voltage generating circuit includes a MOS transistor in which a gate and a drain are short-circuited and a current source that generates a direct current from the first direct-current voltage, and intermittently supplies the direct current to the drain depending on the pulse signal, and outputs a voltage between a source and the drain of the MOS transistor as the bias voltage.

12. The device according to claim 8, further comprising a pulse generating circuit that is driven by the first direct-current voltage and generates a pulse signal, wherein

the second rectifier circuit includes a first MOS transistor, the bias voltage being applied to a gate of the first MOS transistor, the alternating-current signal being input to a drain of the first MOS transistor, and

the bias-voltage generating circuit includes a second MOS transistor that is designed in the same manner as the first MOS transistor, a gate and a drain of the second MOS transistor being short-circuited.

13. The circuit according to claim 10, further comprising a determining circuit that outputs an ON signal when the bias voltage coincides with a voltage between both ends of the capacitor, wherein

the second rectifier circuit includes a switch that is turned ON to drive the second rectifier circuit only when receiving the ON signal.

14. The device according to claim 9, wherein the first rectifier circuit includes a MOS transistor that rectifies the alternating-current signal, a threshold voltage of the MOS transistor in the first rectifier circuit being lower than a threshold voltage of the MOS transistor in the second rectifier circuit.