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Method for leakage reduction in fabrication of high-density FRAM arrays

  • US 20080081380A1
  • Filed: 02/15/2007
  • Published: 04/03/2008
  • Est. Priority Date: 12/17/2004
  • Status: Active Grant
First Claim
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1. A method of fabricating a ferroelectric capacitor structure in a semiconductor device, the method comprising:

  • forming a lower electrode diffusion barrier structure over a dielectric material, the lower electrode diffusion barrier layer at least partially engaging a conductive structure in the dielectric material;

    forming a lower electrode over the lower electrode diffusion barrier structure;

    forming a ferroelectric material over the lower electrode;

    forming an upper electrode over the ferroelectric material;

    forming a patterned etch mask over the upper electrode, the patterned etch mask exposing a portion of the upper electrode;

    etching portions of the upper electrode, the ferroelectric material, and the lower electrode to define a patterned ferroelectric capacitor structure using the patterned etch mask;

    etching a portion of the lower electrode diffusion barrier structure using the patterned etch mask;

    ashing the patterned ferroelectric capacitor structure using a first ashing process comprising an oxygen/nitrogen/water-containing ash;

    performing a wet clean process after the first ashing process; and

    ashing the patterned ferroelectric capacitor structure using a second ashing process.

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