Apparatus, System and Method for Buffering Audio Data to Allow Low Power States in a Processing System During Audio Playback
First Claim
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10. A system comprising:
- a processing system including an audio controller configured to control at least one audio data stream, the processing system having a plurality of power states including at least one low power state;
an audio buffer coupled to the audio controller and external to the processing system, the audio buffer being configured to receive and buffer the at least one audio data stream from the audio controller; and
an audio codec coupled to the audio buffer, the audio codec being configured to receive buffered audio data stream transferred from the audio buffer and to convert the buffered audio data stream into at least one audio output, the audio buffer being configured to transfer the buffered audio data stream to the audio codec independent of the at least one low power state.
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Abstract
An audio data stream from a processing system may be buffered to allow low power states in the processing system during audio playback. An audio buffer may be provided external to the processing system and between the processing system and an audio codec. The audio buffer may also shift to an alternate audio data interface mode when the processing system is in the low power state. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
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Citations
22 Claims
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10. A system comprising:
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a processing system including an audio controller configured to control at least one audio data stream, the processing system having a plurality of power states including at least one low power state; an audio buffer coupled to the audio controller and external to the processing system, the audio buffer being configured to receive and buffer the at least one audio data stream from the audio controller; and an audio codec coupled to the audio buffer, the audio codec being configured to receive buffered audio data stream transferred from the audio buffer and to convert the buffered audio data stream into at least one audio output, the audio buffer being configured to transfer the buffered audio data stream to the audio codec independent of the at least one low power state. - View Dependent Claims (11, 12, 13, 14)
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15. A method comprising:
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providing at least one audio data stream from an audio controller in a processing system; buffering the at least one audio data stream external to the processing system; transitioning the processing system to a low power state; transferring buffered audio data stream to an audio codec while the processing system is in the low power state; and converting the buffered audio data stream into at least one audio output at the audio codec. - View Dependent Claims (16, 17, 18, 19)
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20. A system comprising:
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a system bus; a processor coupled to the system bus; a chipset coupled to the system bus, the chipset including a graphics and memory controller hub and an I/O controller hub configured to control an audio data stream; a system memory coupled to the graphics and memory controller hub; a buffered audio codec coupled to the I/O controller hub, the buffered audio codec comprising; an audio buffer control configured to be coupled to the I/O controller hub and configured to control buffering of the audio data stream received from the I/O controller hub; at least one memory coupled to the audio buffer control and configured to store buffered audio data stream temporarily; and an audio codec coupled to the audio buffer, the audio codec being configured to receive the buffered audio data stream transferred from the audio buffer and to convert the audio data stream into at least one audio output, the audio buffer control being configured to transfer the buffered audio data stream to the audio codec independent of a low power state of the processing system; an audio device coupled to the buffered audio codec and configured to receive the at least one audio output and convert the at least one audio output into sound. - View Dependent Claims (21)
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22-1. The computer of claim 22 wherein the audio data interface modes include an alternate serial pulse code modulation (PCM) interface mode, and wherein the circuitry in the audio buffer control is configured to shift to the alternate PCM interface mode in response to the processing system transitioning to the low power state
Specification