Multi-chip flash memory device and copy-back method thereof
First Claim
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1. A method of copying-back data in a multi-chip flash memory device having first and second memory chips, comprising:
- reading first source data from a first source region of one of the memory chips;
programming the first source data into a target region included in one of the memory chips; and
reading second source data from second source region of the other memory chip different from the memory chip including the target region,wherein reading the second source data is carried out while programming the first source data.
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Abstract
A method and device for copying-back data in a multi-chip flash memory device having first and second memory chips. The method may include reading first source data from a first source region of one of the memory chips; programming the first source data into a target region included in one of the memory chips and reading second source data from second source region of the other memory chip different from the memory chip including the target region. Reading the second source data may be carried out while programming the first source data.
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Citations
19 Claims
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1. A method of copying-back data in a multi-chip flash memory device having first and second memory chips, comprising:
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reading first source data from a first source region of one of the memory chips; programming the first source data into a target region included in one of the memory chips; and reading second source data from second source region of the other memory chip different from the memory chip including the target region, wherein reading the second source data is carried out while programming the first source data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A multi-chip flash memory device comprising:
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a first memory chip; a second memory chip; and a memory controller programming a target region of one of the first and second memory chips with first source data read out from the first memory chip during a copy-back operation, and regulating the first and second memory chips to read second source data from a second source region of the other memory chip different from the memory chip including the target region during a period of the programming. - View Dependent Claims (10, 11, 12)
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13. A multi-chip flash memory device comprising:
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an input/output bus; a first memory chip, during programming, providing status data, which reports completion status of the programming in response to a status detection command and a read enable signal; a second memory chip, during programming, conducting a read to output read data to the input/output bus, before outputting the status data, in response to a read command and interrupting a data output to the input/output bus at an output time of the status data; and a memory controller providing the first and second memory chips with the status detection command, the read command, and an address via the input/output bus and conducting a copy-back operation in accordance with the programming and reading. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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Specification