REDUCING PROGRAM DISTURB IN NON-VOLATILE STORAGE

• US 20080084747A1
• Filed: 09/27/2006
• Published: 04/10/2008
• Est. Priority Date: 09/27/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Lee, Shih-Chung, Hemink, Gerrit Jan
• Granted Patent: US 8,189,378 B2
• Time in Patent Office: Days
• US Class Current: 365/185.18
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 2211/5621 Multilevel programming verification
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Abstract

A non-volatile semiconductor storage system is programmed in a manner that reduces program disturb by applying a higher boosting voltage on one or more word lines that are connected non-volatile storage elements that may be partially programmed.

Claims

1. A method performed during programming of non-volatile storage, comprising:

boosting a group of unselected non-volatile storage elements,

said group of unselected non-volatile storage elements includes a particular non-volatile storage element and a set of one or more non-volatile storage elements that have not completed full programming since a last erase process for said group, said group of unselected non-volatile storage elements further includes other non-volatile storage elements, said boosting includes applying one or more higher boosting signals to said set of one or more non-volatile storage elements and one or more different boosting signals to said other non-volatile storage elements, said one or more higher boosting signals are greater than said one or more different boosting signals; and

applying a program signal to said particular non-volatile storage element while said group is boosted.

2. A method according to claim 1, wherein:

said steps of boosting said group and applying said program signal are part of a programming process that applies said program signal in an order starting from said particular non-volatile storage element and ending at a final non-volatile storage element of said group.

3. A method according to claim 2, wherein:

said group of unselected non-volatile storage elements are part of a NAND string;

said particular non-volatile storage element is at one end of said NAND string, with respect to said group; and

said final unselected non-volatile storage element is at another end of said NAND string, with respect to said group.

4. A method according to claim 1, wherein:

said group of unselected non-volatile storage elements are part of a NAND string; and

said particular non-volatile storage element is at one end of said NAND string and next to a source connection element.

5. A method according to claim 1, wherein:

said set of non-volatile storage elements and said other non-volatile storage elements are on a same side of said particular non-volatile storage element; and

said group of unselected non-volatile storage elements are in series with each other.

6. A method according to claim 1, further comprising:

subjecting said set of non-volatile storage elements to partial programming prior to said step of boosting said group.

7. A method according to claim 1, wherein:

said group of unselected non-volatile storage elements are part of a NAND string having a bit line side and a source side; and

said set of non-volatile storage elements are on said bit line side with respect to said particular non-volatile storage element.

8. A method according to claim 7, wherein:

said set of non-volatile storage elements consist only of a neighbor non-volatile storage element next to said particular non-volatile storage element;

said boosting includes applying an isolation voltage to an isolation non-volatile storage element next to said particular non-volatile storage element and on said source side with respect to said particular non-volatile storage element;

said boosting includes applying a first pass voltage to a plurality of said other non-volatile storage elements;

said boosting includes applying a second pass voltage to said neighbor non-volatile storage element; and

said second pass voltage is greater than said first pass voltage and said first pass voltage is greater than said isolation voltage.

9. A method according to claim 7, wherein:

said set of non-volatile storage elements consist only of a neighbor non-volatile storage element next to said particular non-volatile storage element;

said boosting includes applying an intermediate voltage to one or more intermediate non-volatile storage elements that are on said source side with respect to said particular non-volatile storage element, one of said intermediate non-volatile storage elements is next to said particular non-volatile storage element and;

said boosting includes applying an isolation voltage to an isolation non-volatile storage element next to said one or more intermediate non-volatile storage elements;

said boosting includes applying a first pass voltage to a plurality of said other non-volatile storage elements;

said boosting includes applying a second pass voltage to said neighbor non-volatile storage element, said one or more higher boosting signals consists only of said second pass voltage; and

said second pass voltage is greater than said first pass voltage and said first pass voltage is greater than said intermediate voltage.

10. A method according to claim 7, wherein:

said set of non-volatile storage elements consist only of a neighbor non-volatile storage element next to said particular non-volatile storage element;

said boosting includes applying an intermediate voltage to an intermediate non-volatile storage element next to said particular non-volatile storage element and on said source side with respect to said particular non-volatile storage element;

said boosting includes applying an isolation voltage to an isolation non-volatile storage element next to said intermediate non-volatile storage element;

said boosting includes applying a first pass voltage to a plurality of said other non-volatile storage elements;

said boosting includes applying a second pass voltage to said neighbor non-volatile storage element;

said boosting includes applying said first pass voltage to a given non-volatile storage element next to said neighbor non-volatile storage element;

said boosting includes applying said isolation voltage to a non-volatile storage element next to said given non-volatile storage element; and

said second pass voltage is greater than said first pass voltage and said first pass voltage is greater than said intermediate voltage.

11. A method according to claim 1, wherein:

said set of non-volatile storage elements consist only of a neighbor non-volatile storage element next to said particular non-volatile storage element; and

said neighbor non-volatile storage element has not been programmed prior to said step of boosting.

12. A method according to claim 1, wherein:

said one or more higher boosting signals are applied to control gate of said set of non-volatile storage elements; and

said program signal is applied to a control gate of said particular non-volatile storage element.

13. A method according to claim 1, wherein:

said program signal is part of a series of voltage pulses that increase in magnitude.

14. A method according to claim 1, wherein:

said group of unselected non-volatile storage elements are flash memory devices.

15. A method according to claim 1, wherein:

said group of unselected non-volatile storage elements are multi-state flash memory devices.

16. A method performed during programming of non-volatile storage, comprising:

applying boosting signals to a group of unselected non-volatile storage elements during a programming operation, said group of unselected non-volatile storage elements are on a common side of a targeted unselected non-volatile storage element, a neighbor non-volatile storage element of said group is next to said targeted unselected non-volatile storage element, said targeted unselected non-volatile storage element and said group of unselected non-volatile storage elements are all in series with each other, said applying boosting signals to said group includes applying a particular boosting signal to said neighbor non-volatile storage element of said group and applying a different boosting signal to other non-volatile storage elements of said group, said particular boosting signal is higher than said different boosting signal, said other non-volatile storage elements of said group have not been subjected to programming since a last erase of said group; and

applying a program signal to said targeted unselected non-volatile storage element during said programming operation, said targeted unselected non-volatile storage element does not program due to said boosting signals.

17. A method according to claim 16, wherein:

said program operation is one iteration of a programming process that is completed when a maximum number of iterations has been performed or a minimum number of non-volatile storage elements have reached their target level; and

said method further comprises applying said particular boosting signal to another non-volatile storage element that is on said common side of said targeted unselected non-volatile storage element and is in series with said targeted unselected non-volatile storage element.

18. A method according to claim 16, wherein:

said steps of applying boosting signals and applying said program signal are part of a programming process that applies said program signal in an order starting from said targeted unselected non-volatile storage element and ending at final non-volatile storage element of said group.

19. A method according to claim 18, wherein:

said group of unselected non-volatile storage elements are part of a NAND string; and

said targeted unselected non-volatile storage element is at one end of said NAND string, with respect to said group.

20. A method according to claim 16, further comprising:

subjecting said neighbor non-volatile storage element to partial programming prior to said step of applying boosting signals.

21. A method according to claim 16, wherein:

said group of unselected non-volatile storage elements are part of a NAND string having a bit line side and a source side; and

said neighbor non-volatile storage element is on said bit line side with respect to said targeted non-volatile storage element.

22. A method performed during programming of non-volatile storage, comprising:

applying a particular boosting voltage to a first unselected word line for a set of NAND strings having a set of bit line connections defining a drain side of said NAND strings and a set of source connections defining a source side of said NAND strings, said first unselected word line is next to a selected word line for said set of NAND strings and on said drain said with respect to said selected word line;

applying one or more different boosting voltages to other unselected word lines for said set of NAND strings, said applying a particular boosting voltage and applying a different voltage cause at least a portion of unselected NAND strings of said set of NAND strings to be boosted, said particular boosting voltage is greater than said one or more different boosting voltages; and

applying a program voltage to said selected word line while said at least said portion of unselected NAND strings of said set of NAND strings are boosted.

23. A method according to claim 22, wherein:

said selected word line is next to a source selection line.

24. A method according to claim 22, wherein:

non-volatile storage elements connected to said selected word line are next to source connection elements for said NAND strings.

25. A method according to claim 22, wherein:

non-volatile storage elements connected to said selected word line are subjected to programming prior to other non-volatile storage elements of said NAND strings.

26. A method according to claim 22, wherein:

non-volatile storage elements connected to said first unselected word line are subjected to partial programming prior to said step of applying said particular voltage to said first unselected word line.

27. A method according to claim 22, wherein:

applying another boosting voltage to an unselected word line next to said first unselected word line, said another boosting voltage is greater than said one or more different boosting voltages.

28. A method performed during programming of non-volatile storage, comprising:

applying a particular boosting voltage to a particular unselected word line for a set of NAND strings, said particular unselected word line is next to a selected word line for said set of NAND strings, said selected word line is at an end of said NAND strings with respect to other word lines associated with said NAND strings, non-volatile storage elements connected to said selected word line are first to be subjected to programming with respect to non-volatile storage elements of said NAND strings;

applying one or more different boosting voltages to other unselected word lines for said set of NAND strings, said applying a particular boosting voltage and applying one or more different voltages cause at least a portion of unselected NAND strings of said set of NAND strings to be boosted, said particular boosting voltage is greater than said one or more different boosting voltages; and

applying a program voltage to said selected word line while said at least said portion of unselected NAND strings of said set of NAND strings are boosted.

29. A method according to claim 28, further comprising:

partially programming at least a subset of non-volatile storage elements connected to said particular unselected word line to an intermediate state prior to said step of applying said particular boosting voltage so that said subset of non-volatile storage elements connected to said particular unselected word line are in said intermediate state during said step of applying said particular boosting voltage.

30. A method according to claim 28, wherein:

said step of applying said particular boosting voltage to said particular unselected word line includes providing said particular boosting voltage to control gates for a subset of non-volatile storage elements of said NAND strings.

31. A method performed during programming of non-volatile storage, comprising:

subjecting non-volatile storage elements connected to a first word line to partial programming;

subjecting non-volatile storage elements connected to a second word line to partial programming, said first word line is next to said second word line with respect to a group of word lines associated with a group of non-volatile storage elements that includes said non-volatile storage elements connected to said first word line and said non-volatile storage elements connected to said second word line; and

completing programming for said non-volatile storage elements connected to said first word line including applying a programming signal to said first word line, applying a first pass signal to said second word line and applying one or more other pass signals to other word lines of said group of word lines, said completing programming for said non-volatile storage elements connected to said first word line is performed after subjecting non-volatile storage elements connected to said second word line to partial programming.

32. A method according to claim 31, wherein:

said first pass signal is greater than said one or more other pass signals.

33. A method according to claim 32, wherein:

said applying one or more other pass signals to other word lines of said group of word lines includes applying a second pass signal to each of said other word lines of said group of word lines.

34. A method according to claim 32, wherein:

said applying one or more other pass signals to other word lines of said group of word lines includes applying a second pass signal to a subset of said other word lines of said group of word lines and applying an isolation signal to at least one of said other word lines.

35. A method according to claim 31, wherein:

said first word line is next to a source selection line.

36. A method according to claim 31, wherein:

said non-volatile storage elements connected to said first word line are next to source connection devices.

37. A method according to claim 31, wherein:

said first word line is a first word line of said group of word lines to receive said programming signal.

38. A method according to claim 31, further comprising:

subjecting non-volatile storage elements connected to a third word line to partial programming, said third word line is next to said second word line, said completing programming for said non-volatile storage elements connected to said first word line include applying said first pass signal to said third word line.

39. A method according to claim 31, further comprising:

subjecting non-volatile storage elements connected to a third word line to partial programming, said third word line is next to said second word line, said completing programming for said non-volatile storage elements connected to said first word line include applying a second pass signal to said third word line, said second pass signal is greater than said one or more other pass signals.

40. A method performed during programming of non-volatile storage, comprising:

applying a program signal to a selected word line for a group of non-volatile storage elements;

applying a first pass signal to a set of unselected word lines for said group of non-volatile storage elements; and

applying a higher pass signal than said first pass signal to a neighboring word line, with respect to said selected word line, that is next for completion of programming for its connected non-volatile storage elements of said group of non-volatile storage elements.

41. A method according to claim 40, wherein:

said program signal is applied after starting to apply said first pass signal and said higher pass signal.

42. A method according to claim 40, wherein:

said selected word line is next to a source selection line.

43. A method according to claim 40, wherein:

said group of non-volatile storage elements are arranged in NAND strings with source side ends and drain sides ends;

said selected word line is connected to a subset of said group of non-volatile storage elements; and

said subset is at said source side ends.

44. A method according to claim 40, wherein:

applying said higher pass signal to a word line next to said neighboring word line.

45. A method according to claim 40, wherein:

applying a different higher pass signal to a word line next to said neighboring word line, said different pass signal is greater than said first pass signal.

46. A method according to claim 40, wherein:

applying said higher pass signal to a source side word line, with respect to said selected word line, said set of unselected word lines are on a drain side with respect to said selected word line.