APPARATUS WITH REDUCED PROGRAM DISTURB IN NON-VOLATILE STORAGE

• US 20080084748A1
• Filed: 09/27/2006
• Published: 04/10/2008
• Est. Priority Date: 09/27/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Lee, Shih-Chung, Hemink, Gerrit Jan
• Granted Patent: US 8,184,478 B2
• Time in Patent Office: Days
• US Class Current: 365/185.18
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 2211/5621 Multilevel programming verification

Abstract

A non-volatile semiconductor storage system is programmed in a manner that reduces program disturb by applying a higher boosting voltage on one or more word lines that are connected non-volatile storage elements that may be partially programmed.

Claims

1. A non-volatile storage system, comprising:

a set of control lines;

a set of non-volatile storage elements in communication with said control lines, said set of non-volatile storage elements includes a particular non-volatile storage element, a first subset of one or more non-volatile storage elements and a second subset of one or more non-volatile storage elements; and

a managing circuit, including one or more voltage providing circuits in communication with said set of control lines to provide signals to said set of non-volatile storage elements, in a state when said first subset of one or more non-volatile storage elements have not completed full programming since a last erase of said set said one or more voltage providing circuits provide boosting voltages to said first subset of one or more non-volatile storage elements and said second subset of one or more non-volatile storage elements including providing one or more higher boosting voltages to said first subset of one or more non-volatile storage elements in comparison to said second subset, said one or more voltage providing circuits provide a programming signal to said particular non-volatile storage element while said first subset of one or more non-volatile storage elements and said second subset of one or more non-volatile storage elements are boosted.

2. A non-volatile storage system according to claim 1, wherein:

said managing circuit applies said programming signal to said set of non-volatile storage elements in an order from said particular non-volatile storage element toward an opposite end non-volatile storage element.

3. A non-volatile storage system according to claim 1, wherein:

said particular non-volatile storage element is next to a source connection device.

4. A non-volatile storage system according to claim 1, wherein:

said set of non-volatile storage elements are part of a NAND string; and

said particular non-volatile storage element is at a source side end of said NAND string, with respect to said set of non-volatile storage elements.

5. A non-volatile storage system according to claim 1, wherein:

said first subset of one or more non-volatile storage elements and said second subset of one or more non-volatile storage elements are on a same side of said particular non-volatile storage element; and

said first subset of one or more non-volatile storage elements and said second subset of one or more non-volatile storage elements are in series with each other.

6. A non-volatile storage system according to claim 1, wherein:

said managing circuit partially programs said first subset of one or more non-volatile storage elements prior to said providing of said one or more higher boosting voltages to said neighbor non-volatile storage element.

7. A non-volatile storage system according to claim 1, wherein:

said set of non-volatile storage elements are part of a NAND string having a bit line side and a source side;

said first subset of one or more non-volatile storage elements includes a neighbor non-volatile storage element with respect to said particular non-volatile storage element, and

said neighbor non-volatile storage element is on said bit line side with respect to said targeted unselected non-volatile storage element.

8. A non-volatile storage system according to claim 7, wherein:

said one or more voltage providing circuits apply an isolation voltage to an isolation non-volatile storage element next to said particular non-volatile storage element.

9. A non-volatile storage system according to claim 7, wherein:

said one or more voltage providing circuits apply an intermediate voltage to an intermediate non-volatile storage element next to said particular non-volatile storage element; and

said one or more voltage providing circuits apply an isolation voltage to an isolation non-volatile storage element next to said intermediate non-volatile storage element.

10. A non-volatile storage system according to claim 7, wherein:

said first subset of one or more non-volatile storage elements consists only of a neighbor non-volatile storage element with respect to said particular non-volatile storage element; and

said one or more higher boosting voltage consists only of a higher pass voltage.

11. A non-volatile storage system according to claim 1, wherein:

said set of non-volatile storage elements have floating gates.

12. A non-volatile storage system according to claim 1, wherein:

said control lines are word lines connected to control gate areas of said non-volatile storage elements.

13. A non-volatile storage system according to claim 1, wherein:

a set of non-volatile storage elements are flash memory devices.

14. A non-volatile storage system according to claim 1, wherein:

a set of non-volatile storage elements are multi-state flash memory devices.

15. A non-volatile storage system, comprising:

a first set of non-volatile storage elements in communication with a first common control line that receives an inhibit signal, said first set of non-volatile storage elements includes a targeted unselected non-volatile storage element that receives a programming signal, a drain side neighbor unselected non-volatile storage element that receives a particular boosting signal and a first group of unprogrammed drain side unselected non-volatile storage elements receiving a different boosting signal, said particular boosting signal is greater than said different boosting signal; and

a second set of non-volatile storage elements in communication with a second common control line that receives a program allowance signal, said second set of non-volatile storage elements includes a first non-volatile storage element that receives said programming signal, a second non-volatile storage element that receives said particular boosting signal and a second group of non-volatile storage elements that receives said different boosting signal, said first non-volatile storage element is next to said second non-volatile storage element.

16. A non-volatile storage system according to claim 15, wherein:

said targeted unselected non-volatile storage element is next to a source connection device.

17. A non-volatile storage system according to claim 15, wherein:

said first set of unselected non-volatile storage elements are part of a first NAND string;

said second set of unselected non-volatile storage elements are part of a second NAND string; and

said targeted unselected non-volatile storage element is at a source side end of said first NAND string, with respect to said first set of non-volatile storage elements.

18. A non-volatile storage system according to claim 15, wherein:

said drain side neighbor non-volatile storage element and said first group of unprogrammed drain side unselected non-volatile storage elements are in series with each other.

19. A non-volatile storage system according to claim 15, wherein:

said drain side neighbor non-volatile storage element is partially programmed.

20. A non-volatile storage system according to claim 15, wherein:

said first set of non-volatile storage elements further include a partially programmed non-volatile storage element next to said drain side neighbor unselected non-volatile storage element that receives said particular boosting signal

21. A non-volatile storage system, comprising:

non-volatile storage elements arranged as a set of NAND strings;

a set of word lines in communication with said non-volatile storage elements, said set of word lines comprise a selected word line, a neighbor word line with respect to said selected word line, and one or more other word lines, said one or more other word lines and said neighbor word line are on a common side of said selected word line; and

a managing circuit, including one or more voltage providing circuits in communication with said word lines, said one or more voltage providing circuits provide a neighbor boosting voltage to said neighbor word line and one or more other boosting voltages to said one or more other word lines to boost unselected NAND strings, said one or more voltage providing circuits provide a programming signal to said selected word line while said unselected NAND strings are boosted and prior to applying a programming voltage to said other word lines since a last erase of said NAND strings, said neighbor boosting voltage is greater than said one or more other boosting voltages.

22. A non-volatile storage system according to claim 21, wherein:

said NAND strings have a source side and a bit line side; and

said neighbor word line is on said bit line side with respect to said selected word line.

23. A non-volatile storage system according to claim 22, wherein:

said selected word line is next to a source selection line for said NAND strings.

24. A non-volatile storage system according to claim 21, wherein:

said selected word line is a first word line to receive said programming signal for said NAND strings.

25. A non-volatile storage system according to claim 21, wherein:

said selected word line is an end word line for said NAND strings.

26. A non-volatile storage system according to claim 21, wherein:

said selected word line is not an end word line for said NAND strings.

27. A non-volatile storage system according to claim 21, wherein:

said managing circuit partially programs one or more non-volatile storage elements connected to said neighbor word line prior to said providing of said programming signal to said selected word line.

28. A non-volatile storage system according to claim 21, wherein:

said set of word lines includes an additional word line, additional word line is next to said neighbor word line, said one or more voltage providing circuits provide said neighbor boosting voltage to said additional word line

29. A non-volatile storage system according to claim 21, wherein:

said one or more voltage providing circuits provide a higher boosting voltage to a source side word line with respect to said selected word line.

30. A non-volatile storage system, comprising:

a set of NAND strings;

a set of word lines in communication with said NAND strings, said set of word lines comprise a first word line, a second word line and other word lines, said first word line is next to said second word line with respect to said set of word lines;

a managing circuit, including one or more voltage providing circuits in communication with said word lines, said managing circuit subjects non-volatile storage elements connected to said first word line to partial programming and subjects non-volatile storage elements connected to said second word line to partial programming, said managing circuit subsequently completes programming for said non-volatile storage elements connected to said first word line including applying a programming signal to said first word line, applying a first pass signal to said second word line and applying one or more other pass signals to said other word lines.

31. A non-volatile storage system according to claim 30, wherein:

said first pass signal is greater than said one or more other pass signals.

32. A non-volatile storage system according to claim 30, wherein:

said set of word lines further includes additional word lines; and

said managing circuit applies an isolation signal to at least one of said additional word lines.

33. A non-volatile storage system according to claim 30, wherein:

said first word line is next to a source selection line.

34. A non-volatile storage system according to claim 30, wherein:

said non-volatile storage elements connected to said first word line are next to source connection devices.

35. A non-volatile storage system according to claim 30, wherein:

said first word line is a first word line of said set of word lines to receive said programming signal.

36. A non-volatile storage system according to claim 30, wherein:

said set of word lines further includes a third word line;

said managing circuit subjects non-volatile storage elements connected to said third word line to partial programming; and

said managing circuit subsequently completes programming for said non-volatile storage elements connected to said first word line including applying said first pass signal to said third word line.

37. A non-volatile storage system according to claim 30, wherein:

said set of word lines further includes a third word line;

said managing circuit subjects non-volatile storage elements connected to said third word line to partial programming; and

said managing circuit subsequently completes programming for said non-volatile storage elements connected to said first word line including applying a second pass signal to said third word line, said second pass signal is greater than said one or more other pass signals.