Updating a power supply microcontroller

• US 20080086652A1
• Filed: 10/10/2006
• Published: 04/10/2008
• Est. Priority Date: 10/10/2006
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Exaflop LLC (Alphabet Inc.)
• Inventors: Krieger, Ken, Borchers, Albert
• Granted Patent: US 7,870,379 B2
• Time in Patent Office: Days
• US Class Current: 713/330
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 11/1433 during software upgrading
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57

Abstract

A system is described that includes a power conversion module, a data port, a controller to receive data from the data port, and a data store containing instructions that when executed by the controller perform operations to control the power conversion module. The operations include executing instructions in a first portion of the data store during booting of the controller, executing instructions in a second portion of the data store after the controller has booted, receiving a signal from the data port indicating the instructions in the second portion are to be modified, receiving from the data port modified instructions to be stored in the second portion, and executing, in response to the signal, the instructions in the first portion to store the modified instructions in the second portion.

Claims

1. A system comprising:

a power conversion module;

a data port;

a controller to receive data from the data port; and

a data store containing instructions that when executed by the controller perform operations to control the power conversion module, the operations comprising;

executing instructions in a first portion of the data store during booting of the controller;

executing instructions in a second portion of the data store after the controller has booted;

receiving a signal from the data port indicating the instructions in the second portion are to be modified;

receiving from the data port modified instructions to be stored in the second portion; and

executing, in response to the signal, the instructions in the first portion to store the modified instructions in the second portion.

2. The system of claim 1, wherein the modified instructions replace at least a portion of the instructions previously stored in the second portion of the data store.

3. The system of claim 1, wherein the modified instructions supplement the instructions previously stored in the second portion of the data store.

4. The system of claim 1, wherein the data port receives data from a system management bus (SMBus).

5. The system of claim 1, wherein the operations further comprise restricting access to the instructions in the second portion after receiving the signal indicating the instructions in the second portion are to be modified.

6. The system of claim 5, wherein the operations further comprise restoring access to the modified instructions in the second portion after the instructions in the first portion has stored the modified instructions in the second portion.

7. The system of claim 1, further comprising a primary power source input port to provide power to the controller and a secondary power source input port to provide an alternative power source to the controller.

8. The system of claim 7, wherein the primary power source input port is an alternating current (AC) input port and the secondary power source input port is a DC input port.

9. The system of claim 8, wherein the DC input port is a battery input port.

10. The system of claim 7, wherein the operations further comprise monitoring a power received from the primary power source input port to determine presence or stability of AC power at the primary power source input port.

11. The system of claim 10, wherein the operations further comprise switching to power available from the secondary power source input if the AC power received is determined to be absent or unstable.

12. The system of claim 1, wherein the operations further comprise transmitting a checksum to a host system for validation, the checksum at least partially generated from the modified instructions stored in the second portion.

13. The system of claim 1, wherein the operations further comprise receiving at the data port a retransmission of the modified instructions if the checksum is invalid.

14. The system of claim 1, wherein the operations further comprise requesting a retransmission of the modified instructions to the data port if a checksum based on at least a portion of the modified instructions in the second portion does not match a stored checksum previously determined based on the at least a portion.

15. The system of claim 1, wherein the data port comprises an infrared receiver.

16. The system of claim 1, wherein the data port comprises a radio frequency (RF) receiver.

17. The system of claim 1, wherein the data port comprises a fiber optic receiver.

18. The system of claim 1, further comprising a common bus that couples a plurality of data ports, each data port associated with a power conversion module, a controller, and a data store.

19. The system of claim 1, wherein the common bus is further coupled to a system host configured to transmit modified instructions to the plurality of data ports.

20. The system of claim 19, wherein the system host is further configured to transmit individualized modified instructions to at least one of the plurality of data ports.

21. The system of claim 19, wherein the system host is further configured to receive requests to transmit the modified instructions to the plurality of data ports at different times.

22. The system of claim 1, wherein the operations further comprise executing the modified instructions.

23. The system of claim 1, wherein the first and second portions of the data store are logical divisions or physical divisions.

24. The system of claim 1, wherein the instructions comprises data.

25. A method for loading instructions into a programmable power supply having memory, the method comprising:

maintaining a power output for the programmable power supply during instruction loading operations, the instruction loading operations comprising;

restricting access to a portion of the programmable power supply'"'"'s memory, the memory coupled to a controller of the programmable power supply;

receiving instructions through an internal bus used for communication with the power supply, wherein the received instructions are stored in the portion of the memory; and

restoring access to the portion of the memory so that the controller can execute the received instructions.

26. The method of claim 25, wherein the instruction loading operations comprise modifying instructions previously stored in the portion of the memory.

27. The method of claim 25, wherein the instructions comprise firmware

28. The method of claim 27, wherein the firmware comprises data and executable instructions.

29. The method of claim 25, wherein restricting access to the portion comprises preventing the controller from executing instructions stored in the portion.

30. The method of claim 25, wherein the bus comprises a system management bus.

31. The method of claim 25, wherein limiting access to the portion of the memory comprises initiating a battery backup mode, wherein a battery is used to supply an output of the power supply.

32. The method of claim 25, wherein restoring access to the portion of the memory comprises initiating an alternating current (AC) powered mode, wherein an AC power source is used to supply an output of the power supply.

33. The method of claim 25, further comprising receiving a query through the internal bus, the query comprising a response as to whether the received instructions were installed successfully.

34. A method comprising loading instructions into a power supply system:

executing instructions in a first portion of a data store during initialization of a controller, wherein the data store and the controller are included in the power supply system;

executing instructions in a second portion of the data store after the power supply system has been initialized;

receiving a signal indicating the instructions in the second portion are to be modified; and

executing the instructions in the first portion in response to the signal to store modified instructions in the second portion.

35. A system comprising:

a power converter;

a processor; and

means for loading instructions while maintaining a power output from the power converter, the instructions to be executed by the processor to control the power converter, wherein loading the instructions comprises;

executing a first set of instructions to boot the processor;

executing a second set of instructions after the processor has booted;

receiving a signal to modify the second set of instructions in response to a received signal;

receiving a modified set of instructions; and

using the first set of instructions to update the second instructions with the modified set of instructions, wherein execution of the second set of instructions is restricted until the update is complete.