Method and system for driving an active matrix display circuit

• US 20080088549A1
• Filed: 01/09/2007
• Published: 04/17/2008
• Est. Priority Date: 01/09/2006
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Chaji, G., Nathan, Arokia
• Granted Patent: US 8,253,665 B2
• Time in Patent Office: Days
• US Class Current: 345/80
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0254 Control of polarity reversal in general, other than for liquid crystal displays
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2310/066 Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
• CPC Class Codes: G09G 2320/029 by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes

Abstract

A method and system for driving an active matrix display is provided. The system includes a drive circuit for a pixel having a light emitting device. The drive circuit includes a drive transistor for driving the light emitting device. The system includes a mechanism for adjusting the gate voltage of the drive transistor.

Claims

1. A display system, comprising:

a drive circuit for a pixel having a light emitting device, comprising;

a drive transistor connected to the light emitting device, the drive transistor including a gate terminal, a first terminal and a second terminal;

a first transistor including a gate terminal, a first terminal and a second terminal, the gate terminal of the first transistor being connected to a select line, the first terminal of the first transistor being connected to a data line, the second terminal of the first transistor being connected to the gate terminal of the drive transistor;

a circuit for adjusting the gate voltage of the drive transistor, the circuit including a discharging transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the discharging transistor being connected to the gate terminal of the drive transistor at a node, the voltage of the node being discharged through the discharging transistor; and

a storage capacitor including a first terminal and a second terminal, the first terminal of the storage capacitor being connected to the gate terminal of the drive transistor at the node.

2. A display system according to claim 1, wherein the first terminal of the drive transistor, or a combination of the second terminal of the drive transistor, the second terminal of the discharging transistor and the second terminal of the storage capacitor is connected to the light emitting device.

3. A display system according to claim 1, wherein the first terminal of the discharging transistor is connected to the gate terminal of the drive transistor.

4. A display system according to claim 1, wherein the circuit for adjusting comprises a second transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the second transistor being connected to a bias line, the first terminal of the second transistor being connected to the gate terminal of the drive transistor, the second terminal of the second transistor being connected to the first terminal of the discharging transistor.

5. A display system according to claim 1, wherein the circuit for adjusting comprises a second transistor having a gate terminal, a first terminal and a second terminal, the gate terminal and the first terminal of the second transistor being connected to the gate terminal of the drive transistor, the second terminal of the second transistor being connected to the first terminal of the discharging transistor.

6. A display system according to claim 1, wherein the circuit for adjusting comprises a resistor element having a first terminal and a second terminal, the first terminal of the resistor element being connected to the gate terminal of the drive transistor, the second terminal of the resistor element being connected to the first terminal of the discharging transistor.

7. A display system according to claim 1, wherein the light emitting device comprises a first electrode, a second electrode, and an emission layer between the first electrode and the second electrode, and wherein the first terminal of the drive transistor is connected to one of the first electrode and the second electrode, and wherein the second terminal of the drive transistor, the second terminal of the discharging transistor and the second terminal of the storage capacitor are connected to a power supply.

8. A display system according to claim 1, wherein the light emitting device comprises a first electrode, a second electrode, and an emission layer between the first electrode and the second electrode, and wherein the second terminal of the drive transistor, the second terminal of the discharging transistor and the second terminal of the storage capacitor are connected to one of the first electrode and the second electrode, and wherein the first terminal of the drive transistor is connected to a power supply.

9. A display system according to claim 1, wherein the drive circuit is formed in amorphous, poly, n-type, p-type, CMOS, microcrystalline, nanocrystalline, crystalline silicon or combinations thereof.

10. A display system according to claim 1, further comprising:

a display array including a plurality of pixel circuits arranged in rows and columns, each of the pixel circuits including the drive circuit, and

a driver for driving the display array.

11. A display system according to claim 4, further comprising:

a display array including a plurality of pixel circuits arranged in rows and columns, each of the pixel circuits including the drive circuit, and

a driver for driving the display array,

the bias line being shared by more than one pixel circuit of the plurality of pixel circuits.

12. A display system according to claim 11, wherein the bias line for a row is an adjacent address line for selecting an adjacent row.

13. A method for a display system according to claim 12, wherein the driver provides a programming cycle, a compensation cycle and a driving cycle for each row,

at the programming cycle for a first row, selecting the address line for the first row and providing programming data to the first row,

at the compensation cycle for the first row, selecting the adjacent address line for a second row adjacent to the first row and disenabling the address line for the first row, and

at the driving cycle for the first row, disenabling the adjacent address line.

14. A method according to claim 13, wherein at least the compensation cycle for the first row overlaps with the programming cycle for the second row.

15. A display system, comprising:

one or more than one pixel circuit, each including a light emitting device and a drive circuit, the drive circuit including;

a drive transistor including a gate terminal, a first terminal and a second terminal, the drive transistor being between the light emitting device and a first power supply;

a switch transistor including a gate terminal, a first terminal and a second terminal, the gate terminal of the switch transistor being connected to a first address line, the first terminal of the switch transistor being connected to a data line, the second terminal of the switch transistor being connected to the gate terminal of the drive transistor;

a circuit for adjusting the gate voltage of the drive transistor, the circuit including a sensor for sensing energy transfer from the pixel circuit and a discharging transistor, the sensor having a first terminal and a second terminal, a property of the sensor varying in dependence upon the sensing result, the discharging transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the discharging transistor being connected to a second address line, the first terminal of the discharging transistor being connected to the gate terminal of the drive transistor at a node, the second terminal of the discharging transistor being connected to the first terminal of the sensor; and

a storage capacitor including a first terminal and a second terminal, the first terminal of the storage capacitor being connected to the gate terminal of the drive transistor at the node.

16. A display system according to claim 15, wherein the second terminal of the sensor is connected to a power supply or one of the first terminal and the second terminal of the drive transistor.

17. A display system according to claim 15, wherein the sensor senses a temperature of the pixel circuit.

18. A display system according to claim 15, wherein the sensor senses a luminance of the pixel circuit.

19. A display system according to claim 15, wherein the first address line is an address line for a first row in a display array, and wherein the second address line is an address line for a second row adjacent to the first row.

20. A display system according to claim 19, further comprising a driver for implementing an in-pixel compensation.

21. A method for a display system according to claim 20, wherein the driver provides a programming cycle, a compensation cycle and a driving cycle for each row,

at the programming cycle for a first row, selecting the address line for the first row and providing programming data to the first row,

at the compensation cycle for the first row, selecting the adjacent address line for a second row adjacent to the first row and disenabling the address line for the first row, and

at the driving cycle for the first row, disenabling the adjacent address line.

22. A display system according to claim 15, further comprising at least one read back circuit for reading back the sensor to calibrate the programming data.

23. A display system according to claim 22, further comprising a driver including a first driver for generating the programming data in dependence upon the result of the reading back and a second driver for selecting a row.

24. A display system according to claim 23, wherein the driver implements an of-pixel compensation for calibrating the programming data based on the reading back result.

25. A display system according to claim 24, wherein the at least one read back circuit comprises a charge pump amplifier including a first input a second input and an output, and a capacitor connected between the first input and the output, and wherein the first input is connectable to the corresponding data line via a switch and the second input is connected to a bias line.

26. A display system according to claim 24, wherein the at least one read back circuit comprises a trans-resistance amplifier including an input and an output, and wherein the input of the trans resistance amplifier is connectable to the corresponding data line via a switch.

27. A method for a display system according to claim 25, wherein the of-panel compensation including first, second, third, fourth and fifth operation cycles,

at the first operation cycle for a first row, selecting the first address line for the first row and programming the pixel circuits in the first row;

at the second operation cycle for the first row, disenabling the first address line for the first row and driving the pixel circuits in the first row;

at the third operation cycle for the first row, selecting the first address line for the first row and charging the voltage at the node to a bias voltage;

at the fourth operation cycle for the first row, selecting the adjacent address line for a second row adjacent to the first row and disenabling the first address line for the first row to discharge the voltage at the node from the sensor; and

at the fifth operation cycle for the first row, reading back the change in the voltage at the node from the sensor by selecting the first address line for the first row.

28. A method for a display system according to claim 26, wherein the of-panel compensation including first, second, and third operation cycles,

at the first operation cycle for a first row, selecting the first address line for the first row and programming the pixel circuits in the first row,

at the second operation cycle for the first row, disenabling the address line for the first row and driving the pixel circuits in the first row;

and

at the third operation cycle for the first row, monitoring the output from the sensor by selecting the address line for the first row and the adjacent address line for a second row adjacent to the first row.

29. A display system according to claim 23, wherein the one or more than one pixel is one or more than one reference pixel circuit for one or more than one second pixel circuit, and wherein the read back operation is applied to the one or more than one reference pixel circuit to calibrate the programming data for the second pixel circuit.

30. A display system according to claim 29, wherein the driver reads back the aging of the sensor based on the output from the reference pixel circuit.

31. A display system, comprising:

a display array including a plurality of pixel circuits arranged in rows and columns, each including a light emitting device and a drive circuit; and

a drive system for driving the display array, the drive circuit including;

a drive transistor including a gate terminal, a first terminal and a second terminal, the drive transistor being between the light emitting device and a first power supply;

a first transistor including a gate terminal, a first terminal and a second terminal, the gate terminal of the first transistor being connected to an address line, the first terminal of the first transistor being connected to a data line, the second terminal of the first transistor being connected to the gate terminal of the drive transistor;

a circuit for adjusting the gate voltage of the drive transistor, the circuit including a second transistor, the second transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the second transistor being connected to a control line, the first terminal of the second transistor being connected to the gate terminal of the drive transistor; and

a storage capacitor including a first terminal and a second terminal, the first terminal of the storage capacitor being connected to the gate terminal of the drive transistor,

the drive system driving the pixel circuit so that the pixel circuit is turned off for a portion of a frame time.

32. A display system according to claim 31, wherein the circuit comprises a third transistor connected between the second transistor and the light emitting device, the resistance of the third transistor being changed in dependence upon the aging of the pixel circuit.

33. A display system according to claim 31, wherein the circuit comprises a sensor having a resistance which varies in dependence upon the aging of the pixel circuit.

34. A method for a display system according to claim 31, wherein the drive system provides a frame time having a programming cycle, a discharge cycle, an emission cycle, a reset cycle, and a relaxation cycle, for each row,

at the programming cycle, programming the pixel circuits on the row by activating the address line for the row;

at the discharge cycle, partially discharging the voltage on the gate terminal of the drive transistor by deactivating the address line for the row and activating the control line for the row;

at the emission cycle, deactivating the control line for the row, and controlling the light emitting device by the drive transistor;

at the reset cycle, discharging the voltage on the gate terminal of the drive transistor by activating the control line for the row; and

at the relaxation cycle, deactivating the control line for the row.

35. A display system according to claim 31, wherein the driver system comprises a first driver having a drive output for each row, a second driver for driving the data line for each column, and a switch for each row, the address line for a row being selectively connected to the corresponding drive output of the first driver or a voltage line having a predetermined voltage level by the corresponding switch.

36. A display system according to claim 31, wherein the control line for the row is connected to a drive output different from that of the address line for the row.