Method for Programming a Multi-Level Non-Volatile Memory Device
First Claim
1. A method for programming multi-level non-volatile memory comprising at least one flag cell and a plurality of multi-bit storage cells, each of the plurality of multi-bit storage cells capable of storing different levels of charge usable to represent data, the data represented by a least significant bits (LSBs) and a most significant bits (MSBs), the method comprising:
- programming the storage cells first with LSBs and then with MSBs such that each of the programmed storage cells;
has a threshold voltage lower than a voltage VR1 when it is desired that the storage cell store a first value;
has a threshold voltage greater than the voltage VR1 and lower than a voltage VR2 when it is desired that the storage cell store a second value;
has a threshold voltage greater than the voltage VR2 and lower than a voltage VR3 when it is desired that the storage cell store a third value; and
has a threshold voltage greater than a voltage VR3 when it is desired that the storage cell store a fourth value;
wherein VR1<
VR2<
VR3; and
programming the flag cell to have a threshold voltage greater than the voltage VR3 to indicate that the MSBs have been programmed.
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Abstract
A method for programming multi-level non-volatile memory. A plurality of multi-bit storage cells capable of storing different levels of charge usable to represent data represented by a least significant bits (LSBs) and a most significant bits (MSBs) are programmed first with LSBs and then with MSBs. The programmed storage cells have a threshold voltage lower than a voltage VR1 to store a first value, greater than VR1 and lower than a voltage VR2 to store a second value, and greater than VR2 and lower than a voltage VR3 to store a third value. Each of the cells has a threshold voltage greater than a voltage VR3 when it is desired that the storage cell store a fourth value. VR1 is less than VR2 which is less than VR3. The flag cell is programmed to have a threshold voltage greater than VR3 to indicate that the MSBs have been programmed.
106 Citations
28 Claims
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1. A method for programming multi-level non-volatile memory comprising at least one flag cell and a plurality of multi-bit storage cells, each of the plurality of multi-bit storage cells capable of storing different levels of charge usable to represent data, the data represented by a least significant bits (LSBs) and a most significant bits (MSBs), the method comprising:
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programming the storage cells first with LSBs and then with MSBs such that each of the programmed storage cells;
has a threshold voltage lower than a voltage VR1 when it is desired that the storage cell store a first value;
has a threshold voltage greater than the voltage VR1 and lower than a voltage VR2 when it is desired that the storage cell store a second value;
has a threshold voltage greater than the voltage VR2 and lower than a voltage VR3 when it is desired that the storage cell store a third value; and
has a threshold voltage greater than a voltage VR3 when it is desired that the storage cell store a fourth value;
wherein VR1<
VR2<
VR3; and
programming the flag cell to have a threshold voltage greater than the voltage VR3 to indicate that the MSBs have been programmed. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A controller for controlling memory according to a method for programming multi-level non-volatile memory comprising at least one flag cell and a plurality of multi-bit storage cells, each of the plurality of multi-bit storage cells capable of storing different levels of charge usable to represent data, the data represented by least significant bits (LSBs) and a most significant bits (MSBs), the method comprising:
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programming the storage cells first with LSBs and then with MSB data such that each of the programmed storage cells;
has a threshold voltage lower than a voltage VR1 when it is desired that the storage cell store a first value;
has a threshold voltage greater than the voltage VR1 and lower than a voltage VR2 when it is desired that the storage cell store a second value;
has a threshold voltage greater than the voltage VR2 and lower than a voltage VR3 when it is desired that the storage cell store a third value; and
has a threshold voltage greater than a voltage VR3 when it is desired that the storage cell store a fourth value;
wherein VR1<
VR2<
VR3; and
programming the flag cell to have a threshold voltage greater than the voltage VR3 to indicate that the MSB data have been programmed. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for programming a multi-level non-volatile memory comprising at least one flag cell and a plurality of multi-bit storage cells, each of the plurality of multi-bit storage cells capable of storing different levels of charge usable to represent data, the data represented by a plurality of data pages, the method comprising:
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sequentially programming one or more of the plurality of data pages such that each of the programmed storage cells has a threshold voltage within one of a plurality of threshold voltage ranges comprising a first range and a plurality of subsequent ranges, wherein each of the plurality of subsequent ranges is defined as being equal to or greater than a respective verify voltage, wherein each of the plurality of subsequent ranges is read at a respective read voltage and wherein for each given subsequent range the respective read voltage is less than the respective verify voltage by a margin M; and
programming the at least one flag cell to a threshold voltage within a threshold voltage range indicative of the number of data pages that have been programmed, wherein the flag cell threshold voltage range is defined as being equal to or greater than a flag cell verify voltage, wherein the flag cell is read at a flag cell read voltage, and the flag cell read voltage is less than the flag cell verify voltage by an enhanced margin Menhanced that is larger than the margin M. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A controller for controlling memory according to a method for programming multi-level non-volatile memory comprising at least one flag and a plurality of multi-bit storage cells, each of the plurality of multi-bit storage cells capable of storing different levels of charge usable to represent data, the data represented by a plurality of data pages, the method comprising:
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sequentially programming one or more of the plurality of data pages such that each of the programmed storage cells has a threshold voltage within one of a plurality of threshold voltage ranges comprising a first range and a plurality of subsequent ranges, wherein each of the plurality of subsequent ranges is defined as being equal to or greater than a respective verify voltage, wherein each of the plurality of subsequent ranges is read at a respective read voltage, and wherein for each given subsequent range, the respective read voltage is less than the respective verify voltage by a margin M; and
programming the at least one flag cell to a threshold voltage within a threshold voltage range indicative of the number of data pages that have been programmed, wherein the flag cell threshold voltage range is defined as being equal to or greater than a flag cell verify voltage, wherein the flag cell is read at a flag cell read voltage, and the flag cell read voltage is less than the flag cell verify voltage by an enhanced margin Menhanced that is larger than the margin M. - View Dependent Claims (23, 24, 25, 26, 27, 28)
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Specification