Signal Processing Unit

• US 20080090545A1
• Filed: 04/14/2005
• Published: 04/17/2008
• Est. Priority Date: 05/14/2004
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Matsuno, Noriaki, Tokairin, Takashi
• Granted Patent: US 7,565,127 B2
• Time in Patent Office: Days
• US Class Current: 455/343.1
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04L 25/061 providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset removal of dc offset in coupling arrangements H04L25/029, H04L25/0296

Abstract

A signal processing unit of the present invention includes: input terminal (21) to which an input signal is input; high-pass filter (23) for cutting off the DC component of the input signal; output terminal (22) for outputting a signal output from high-pass filter (23) as an output signal; determination element (26) for determining whether or not the voltage of the output signal falls out of a predetermined detection threshold range; and, switches (27,28) for connecting the output node of high-pass filter (23) to a power supply circuit when the voltage of the output signal is determined to fall out of the detection threshold range at determination element (26).

Claims

1. A signal processing unit comprising:

an input terminal to which an input signal is input;

a first element for cutting off the DC component of the input signal;

an output terminal for outputting a signal output from the first element as an output signal;

a determination element for determining whether or not the voltage of the output signal falls out of a predetermined detection threshold range; and

,

a switch for connecting the output node of the first element to a power supply circuit when at the determination element the voltage of the output signal was determined to fall out of the detection threshold range.

2. The signal processing unit according to claim 1, wherein

the power supply circuit comprises a first power supply circuit and a second power supply circuit,

the switch comprises:

a first switch, one end of which is connected to the first power supply circuit while the other end is connected to the output node of the first element; and

a second switch, one end of which is connected to the second power supply circuit while the other end is connected to the output node of the first element, and

the determination element, when it determined that the voltage of the output signal fell out of the detection threshold range, drives the first switch so as to connect the output node of the first element to the first power supply circuit or drives the second switch so as to connect the output node of the first element to the second power supply circuit.

3. The signal processing unit according to claim 2, wherein the first power supply circuit is a power supply voltage of the signal processing unit.

4. The signal processing unit according to claim 3, wherein the power supply voltage is shared with a power supply voltage for driving the entire signal processing unit.

5. The signal processing unit according to claim 2, wherein the first power supply circuit is a constant voltage source.

6. The signal processing unit according to claim 2, wherein the second power supply circuit is the ground of the signal processing unit.

7. The signal processing unit according to claim 2, wherein the first power supply circuit is a constant current source for flowing out current to the first switch and the second power supply circuit is a constant current source for accepting current from the second switch.

8. The signal processing unit according to claim 1, further comprising a second element which is provided between the output node of the first element and the output terminal, and amplifies the signal output from the first element and outputs it to the output terminal while the gain is changed by a gain control signal input from without.

9. The signal processing unit according to claim 1, further comprising a third element which is provided between the output terminal and the input node of the determination element, and amplifies the signal output from the first element and outputs it to the determination element while the gain is changed by a gain control signal input from without.

10. The signal processing unit according to claim 1, further comprising:

a second element which is provided between the output node of the first element and the output terminal, and amplifies the signal output from the second element and outputs it to the output terminal while the gain is changed by a gain control signal input from without; and

a third element which is provided between the output terminal and the input node of the determination element, and amplifies the signal output from the first element and outputs it to the determination element while the gain is changed by a gain control signal input from without.

11. The signal processing unit according to claim 10, wherein the product of the gain of the second element and the gain of the third element is constant.

12. The signal processing unit according to claim 1, wherein the first element is a high-pass filter.

13. The signal processing unit according to claim 1, wherein the first element is a capacitance.

23. The signal processing unit according to claim 1, further comprising a low-pass filter between the output terminal and the input node of the determination element.

24. The signal processing unit according to claim 1, wherein the determination element includes a CMOS inverter consisting of an n-type MOSFET and a p-type MOSFET, the detection threshold range is adjusted by modifying the current drive capability ratio of the n-type MOSFET and the p-type MOSFET.

25. The signal processing unit according to claim 2, wherein the determination element includes an n-type MOSFET and a p-type MOSFET which perform source-follower operation and three resistors connected in series between the first power supply circuit and the second power supply circuit;

the node to which the gate terminals of the n-type MOSFET and the p-type MOSFET are connected in parallel forms the input node of the determination element; and

the source terminals of the n-type MOSFET and the p-type MOSFET are connected to two different nodes of the three resistors, and the two nodes constitute the output nodes of the determination element which are respectively connected to the first switch and second switch element.

26. The signal processing unit according to claim 1, wherein the input terminal is connected to the output node of any one of a mixer, a variable-gain amplifier and a low-pass filter in a down conversion receiver

27. The signal processing unit according to claim 1, wherein the output terminal is connected to the input node of any one of a variable-gain amplifier and a low-pass filter in a down conversion receiver.

28. The signal processing unit according to claim 8, wherein a gain control signal for controlling the gain of a variable-gain amplifier in a down conversion receiver is branched and input to the second element so that the second element changes the gain based on the gain control signal

29. The signal processing unit according to claim 9, wherein a gain control signal for controlling the gain of a variable-gain amplifier in a down conversion receiver is branched and input to the second element so that the third element changes the gain based on the gain control signal.

30. The signal processing unit according to claim 10, wherein a gain control signal for controlling the gain of a variable-gain amplifier in a down conversion receiver is branched and input to the second element so that the second element changes the gain based on the gain control signal.

31. The signal processing unit according to claim 10, wherein a gain control signal for controlling the gain of a variable-gain amplifier in a down conversion receiver is branched and input to the second element so that the third element changes the gain based on the gain control signal.