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MEMORY CONTROL APPARATUS

  • US 20080091889A1
  • Filed: 07/24/2007
  • Published: 04/17/2008
  • Est. Priority Date: 10/06/2006
  • Status: Abandoned Application
First Claim
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1. A memory control apparatus being characterized by comprising;

  • a peripheral being configured to include a built-in memory storing data;

    a master being configured to output an address to said main memory and said built-in memory and access said main memory and said built-in memory;

    a mode setting device being configured to set an access mode of the access object to said main memory and said built-in memory;

    a decoding device being configured to decode said address from said master according to said set access mode and output decoding results thereof; and

    a selector being configured to select an access information including said decoding results given to said built-in memory corresponding to said set access mode;

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