System and method for iterative reconstruction using parallel processing

• US 20080095300A1
• Filed: 10/05/2006
• Published: 04/24/2008
• Est. Priority Date: 10/05/2006
• Status: Abandoned Application

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Smith, William D., Schnore, Austars Raymond, Zingelewicz, Stephen Eric, Basu, Samit Kumar, De Man, Bruno, Dixon, Walter Vincent
• Application Number:
  US11/543,377
• Publication Number:
  US 20080095300A1
• Time in Patent Office: Days
• US Class Current: 378/4
• CPC Class Codes: A61B 6/032 Transmission computed tomography [CT]
• CPC Class Codes: G01N 23/04 and forming images of the material
• CPC Class Codes: G06T 11/006 Inverse problem, transformation from projection-space into object-space, e.g. transform methods, back-projection, algebraic methods
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 2211/424 Iterative
• CPC Class Codes: G06T 2211/428 Real-time

Abstract

A method and system are provided for processing an acquired image signal in parallel to generate a reconstructed image signal. In one embodiment, a processing component is provided comprising one or more field-programmable gate arrays configured as co-processors. Other aspects of the present technique provide a pipelined processor configured to forward- and back-project image data using the same data path and arithmetic units.

Claims

1. A tomographic imaging system, comprising:

a processing component comprising one or more field programmable gate arrays configured as co-processors to a microprocessor.

2. The tomographic imaging system of claim 1, wherein each field programmable gate array comprises one or more reconstruction units configured to operate in parallel.

3. The tomographic imaging system of claim 1, wherein each field programmable gate array comprises one or more reconstruction units configured to iteratively reconstruct an image.

4. The tomographic imaging system of claim 1, wherein each field programmable gate array comprises one or more pipelined processors.

5. The tomographic imaging system of claim 1, further comprising:

an X-ray source configured to emit X-rays;

a detector configured to generate electrical signals in response to the emitted X-rays; and

a data acquisition subsystem configured to acquire the electrical signals and to provide the electrical signals or a corresponding signal to the processing component.

6. The tomographic imaging system of claim 1, wherein the tomographic imaging system comprises at least one of a computed tomography imaging system, a positron emission tomography imaging system, a nuclear medicine imaging system, or a magnetic resonance imaging system.

7. A method for reconstructing a tomographic image, comprising:

processing an acquired image signal using one or more field programmable gate arrays configured as co-processors to a microprocessor to generate a reconstructed image signal.

8. The method of claim 7, wherein processing the acquired image signal comprises processing the acquired image signal with one or more reconstruction units running in parallel on each field programmable gate array.

9. The method of claim 7, wherein processing the acquired image signal comprises iteratively processing the acquired image signal with one or more reconstruction units on each field programmable gate array.

10. The method of claim 7, wherein processing the acquired image signal comprises processing the acquired image signal with one or more pipelined processors on each field programmable gate array.

11-19. -19. (canceled)

20. A pipelined processor configured to forward- and back-project image data using the same data path and arithmetic units.

21. The pipelined processor of claim 20, wherein the pipelined processor is configured to process at least one pixeudetector boundary per clock cycle.

22. The pipelined processor of claim 20, wherein the pipelined processor is configured to implement one of a pixel-driven projection technique, a ray-driven projection technique, or a distance-driven projection technique.

23. A method for processing image data, comprising:

performing projection and back-projection operations on a pipelined processor, wherein the projection and back-projection operations employ the same data path and arithmetic units.

24. The method of claim 23, wherein the pipelined processor is configured to process at least one pixel/detector boundary per clock cycle.

25. The method of claim 23, wherein the projection and back-projection operations are based on one of a pixel-driven projection technique, a ray-driven projection technique, or a distance-driven projection technique.

26-34. -34. (canceled)