ADAPTIVE PREDISTORTION FOR A TRANSMIT SYSTEM

• US 20080096497A1
• Filed: 10/18/2007
• Published: 04/24/2008
• Est. Priority Date: 07/03/2003
• Status: Active Grant

• Current Assignee: Zarbana Digital Fund LLC (Intellectual Ventures LLC)
• Original Assignee: Zarbana Digital Fund LLC (Intellectual Ventures LLC)
• Inventors: Saed, Aryan
• Granted Patent: US 7,737,778 B2
• Time in Patent Office: Days
• US Class Current: 455/114.3
• CPC Class Codes: H03F 1/0294 using vector summing of two or more constant amplitude phase-modulated signals
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 1/3282 Acting on the phase and the amplitude of the input signal
• CPC Class Codes: H03F 2201/3233 Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence

Abstract

Systems, methods, and devices relating to the provision of deliberate predistortion to an input signal to compensate for distortions introduced by an amplifier subsystem. An input signal is received by a signal processing system which includes a predistortion subsystem. The input signal is decomposed and the fragments are then predistorted by the predistortion subsystem by applying a deliberate predistortion to the fragments. The predistorted fragments are then separately processed and recombined to arrive at the system output signal. The predistortion subsystem adaptively adjusts based on characteristics of the system output signal. Also, the predistortion subsystem is equipped with a control system that is state based—the state of the predistortion subsystem is dependent upon the prevailing conditions and, when required, the control system switches the state of the predistortion subsystem. A feedback signal, a replica of the system output signal, is used in updating lookup table entries used to determine the predistortion.

Claims

1-60. -60. (canceled)

61. A method for controlling a predistortion subsystem for a transmission system, comprising:

processing a status of the predistortion subsystem;

storing settings for a control device configured to control the predistortion subsystem; and

transitioning the control device from one operating state to another operating state of a plurality of operating states based at least in part on the storing the settings and the processing the status.

62. The method of claim 61 comprising:

controlling an update duty cycle for the predistortion subsystem; and

updating at least on internal lookup table according to the update duty cycle.

63. The method of claim 61 comprising:

controlling an initialization duty cycle for the predistortion subsystem; and

initializing the predistortion subsystem according to the initialization duty cycle.

64. The method of claim 63 where controlling the initialization duty cycle occurs responsive to updating at least one internal lookup table of the predistortion subsystem.

65. The method of claim 61 where transitioning the control device from one operating state to another operating state includes monitoring a level of distortion of the predistortion subsystem.

66. An adaptive predistortion subsystem for processing an input signal to produce an output signal, comprising:

means for decomposing the input signal into at least two separate components, each of the at least two separate components being processed separately;

means for deliberately predistorting the at least two separate components, responsive to the output signal, to produce at least two predistorted signals, the means for deliberately predistorting being configured to compensate for distortions in the output signal; and

means for combining the predistorted signals to produce the output signal.

67. The adaptive predistortion subsystem of claim 66 comprising:

means for separately processing each of the at least two predistorted signals; and

means for combining the at least two separately processed predistorted signals to produce the output signal.

68. The adaptive predistortion subsystem of claim 67 where the means for separately processing each of the at least two predistorted signals includes at least one means for amplifying.

69. The adaptive predistortion subsystem of claim 68 where the at least one means for amplifying includes at least one means for non-linearly amplifying.

70. The adaptive predistortion subsystem of claim 68 where the at least one means for amplifying includes at least one means for switch mode amplifying.

71. The adaptive predistortion subsystem of claim 68

where the means for decomposing the input signal includes means for accessing an entry in a lookup table associated with the input signal;

and

where the means for separately predistorting the at least two separate components occurs responsive to the means for accessing the entry.

72. The adaptive predistortion subsystem of claim 66 where the means for combining the predistorted signals introduces at least some of the distortions.

73. A computer readable medium having instructions stored thereon that when executed by a processor result in:

decomposing an input signal into at least two separate components, each of the at least two separate components being processed separately;

deliberately predistorting the at least two separate components, responsive to an output signal, to produce at least two predistorted signals, the deliberate predistortion being configured to compensate for distortions in the output signal; and

combining the predistorted signals to produce the output signal.

74. The computer readable medium of claim 73 where the instructions stored thereon when executed by the processor further result in:

separately processing each of the at least two predistorted signals; and

combining the at least two separately processed predistorted signals to produce the output signal.

75. The computer readable medium of claim 74 where the instructions stored thereon when executed by the processor further result in amplifying the at least two predistorted signals.

76. The computer readable medium of claim 74 where the instructions stored thereon when executed by the processor further result in non-linearly amplifying the at least two predistorted signals.

77. The computer readable medium of claim 74 where the instructions stored thereon when executed by the processor further result in switch mode amplifying the at least two predistorted signals.

78. The computer readable medium of claim 74 where the instructions stored thereon when executed by the processor further result in accessing an entry in a lookup table associated with the input signal, where deliberately predistorting the at least two separate components occurs responsive to the accessing the entry.

79. The computer readable medium of claim 73 where the instructions stored thereon when executed by the processor further result in introducing at least some distortions responsive to the combining the predistorted signals.

80. A computer readable medium having instructions stored thereon that when executed by a processor result in:

decomposing an input signal into at least two component signals;

applying a deliberate predistortion to each of the at least two component signals to produce at least two predistorted signals;

combining the at least two predistorted signals to produce the system output signal; and

adjusting the deliberate predistortion based on at least one characteristic of the output signal.

81. The computer readable medium of claim 80 where the instructions stored thereon when executed by the processor further result in:

separately processing each of the at least two predistorted signals; and

combining the at least two separately processed predistorted signals to produce the output signal.

82. The computer readable medium of claim 81 where the instructions stored thereon when executed by the processor further result in amplifying the at least two predistorted signals.

83. The computer readable medium of claim 81 where the instructions stored thereon when executed by the processor further result in non-linearly amplifying the at least two predistorted signals.

84. The computer readable medium of claim 81 where the instructions stored thereon when executed by the processor further result in switch mode amplifying the at least two predistorted signals.

85. The computer readable medium of claim 81 where the instructions stored thereon when executed by the processor further result in accessing an entry in a lookup table associated with the input signal, where deliberately predistorting the at least two component signals occurs responsive to the accessing the entry.

86. The computer readable medium of claim 80 where the instructions stored thereon when executed by the processor further result in introducing at least some distortions responsive to the combining the predistorted signals.