Encoder, method of encoding, and computer-readable recording medium

• US 20080097751A1
• Filed: 10/11/2007
• Published: 04/24/2008
• Est. Priority Date: 10/23/2006
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Tsuchinaga, Yoshiteru, Makiuchi, Takashi, Shirakawa, Miyuki, Suzuki, Masanao
• Granted Patent: US 8,612,219 B2
• Time in Patent Office: Days
• US Class Current: 704/205
• CPC Class Codes: G10L 19/002 Dynamic bit allocation for perceptual audio coders G10L19/032
• CPC Class Codes: G10L 21/038 using band spreading techniques

Abstract

An SBR encoder includes a filter bank that receives an input signal, a time/frequency grid generator that controls a number of bits of various parameters, a parameter calculator that calculates various parameters, a parameter coding unit that encodes the parameters, a multiplexer that multiplexes encoded data, an upper-limit number-of-bit storage unit that stores an upper limit of the number of bit of encoded data of high-frequency component finally generated in a high-pass encoding process, and a number-of-bit controller. The number-of-bit controller controls the high-pass encoding process by preferentially encoding a parameter having a large influence to sound quality and not encoding a parameter having a small influence to the sound quality relative to a plurality of parameters, so that the number of bits of the encoded data of high-frequency component finally generated in the high-pass encoding process becomes equal to or less than the upper limit to be stored in the upper-limit number-of-bit storage unit.

Claims

1. An encoder that performs a high-pass encoding process for dividing an input signal into frames formed of certain samples and calculating a plurality of parameters indicating characteristics of a high-frequency component in the input signal to generate encoded data of high-frequency component, comprising:

an upper-limit number-of-bit storage unit that stores an upper limit of a number of bits of the encoded data of high-frequency component finally generated in the high-pass encoding process; and

a number-of-bit controller that controls the high-pass encoding process so that the number of bits of the encoded data of high-frequency component finally generated in the high-pass encoding process becomes equal to or less than the upper limit stored in the upper-limit number-of-bit storage unit.

2. The encoder according to claim 1, further comprising a number-of-bit estimating unit that estimates the upper limit from a number of bits obtained by performing the high-pass encoding process halfway relative to an encoding target, and stores the upper limit in the upper-limit number-of-bit storage unit, wherein

the number-of-bit controller controls the high-pass encoding process so that the number of bits becomes equal to or less than the upper limit when the upper limit is stored in the upper-limit number-of-bit storage unit by the number-of-bit estimating unit.

3. The encoder according to claim 1, further comprising a number-of-bit estimating unit that estimates the upper limit from a number of bits obtained by performing the high-pass encoding process completely relative to an encoding target, and stores the upper limit in the upper-limit number-of-bit storage unit, wherein

the number-of-bit controller controls the high-pass encoding process so that the number of bits becomes equal to or less than the upper limit when the upper limit is stored in the upper-limit number-of-bit storage unit by the number-of-bit estimating unit.

4. The encoder according to the claim 1, wherein the upper-limit number-of-bit storage unit preliminarily stores the upper limit received from an external device, and

the number-of-bit controller controls the high-pass encoding process so that the number of bits becomes equal to or less than the upper limit when the upper limit is stored in the upper-limit number-of-bit storage unit.

5. The encoder according to claim 1, wherein the number-of-bit controller controls the high-pass encoding process by replacing the encoded data of high-frequency component finally generated in the high-pass encoding process by encoded data of high-frequency component formed of the number of bits equal to or less than the upper limit.

6. The encoder according to claim 1, wherein the number-of-bit controller controls, relative to the parameters, the high-pass encoding process by reducing a number of grids in a frequency or time direction in the frames.

7. The encoder according to claim 1, wherein the number-of-bit controller controls, relative to the parameters, the high-pass encoding process by preferentially encoding a parameter having a large influence to sound quality and not encoding a parameter having a small influence to the sound quality.

8. The encoder according to claim 1, wherein the number-of-bit controller controls, relative to the parameters, the high-pass encoding process by preferentially encoding a parameter belonging to a frequency component below a predetermined frequency.

9. The encoder according to claim 2, further comprising a low-pass encoder that performs a low-pass encoding process for generating encoded data of low-frequency component from a low-frequency component in the input signal;

and

a multiplexer that multiplexes the encoded data of low-frequency component generated by the low-pass encoder and the encoded data of high-frequency component generated in the high-pass encoding process, and transmits the multiplexed data to the external device.

10. The encoder according to claim 3, further comprising a low-pass encoder that performs a low-pass encoding process for generating encoded data of low-frequency component from a low-frequency component in the input signal;

and

a multiplexer that multiplexes the encoded data of low-frequency component generated by the low-pass encoder and the encoded data of high-frequency component generated in the high-pass encoding process, and transmits the multiplexed data to the external device.

11. The encoder according to claim 9, wherein the number-of-bit estimating unit estimates the upper limit from a number of bits of the encoded data of low-frequency component finally generated by the low-pass encoding process and stores the upper limit in the upper-limit number-of-bit storage unit, and

the number-of-bit controller controls the high-pass encoding process so that the number of bits becomes equal to or less than the upper limit when the upper limit is stored in the upper-limit number-of-bit storage unit by the number-of-bit estimating unit.

12. The encoder according to claim 10, wherein the number-of-bit estimating unit estimates the upper limit from a number of bits of the encoded data of low-frequency component finally generated by the low-pass encoding process and stores the upper limit in the upper-limit number-of-bit storage unit, and

the number-of-bit controller controls the high-pass encoding process so that the number of bits becomes equal to or less than the upper limit when the upper limit is stored in the upper-limit number-of-bit storage unit by the number-of-bit estimating unit.

13. An encoding method that performs a high-pass encoding process for dividing an input signal into frames formed of certain samples and calculating a plurality of parameters indicating characteristics of a high-frequency component in the input signal to generate encoded data of high-frequency component, comprising:

storing an upper limit of a number of bits of the encoded data of high-frequency component finally generated in the high-pass encoding process; and

controlling the high-pass encoding process so that the number of bits of the encoded data of high-frequency component finally generated in the high-pass encoding process becomes equal to or less than the upper limit stored in the upper-limit number-of-bit storage unit.

14. A computer-readable recording medium that stores therein a computer program performing a high-pass encoding process for dividing an input signal into frames formed of certain samples and calculating a plurality of parameters indicating characteristics of a high-frequency component in the input signal to generate encoded data of high-frequency component, the computer program causing a computer to execute:

storing an upper limit of a number of bits of the encoded data of high-frequency component finally generated in the high-pass encoding process; and

controlling the high-pass encoding process so that the number of bits of the encoded data of high-frequency component finally generated in the high-pass encoding process becomes equal to or less than the upper limit stored in the upper-limit number-of-bit storage unit.