HIGH SPEED ERROR CORRECTING SYSTEM

• US 20080098282A1
• Filed: 10/20/2006
• Published: 04/24/2008
• Est. Priority Date: 10/20/2006
• Status: Abandoned Application

• Current Assignee: MediaTek, Inc.
• Original Assignee: MediaTek, Inc.
• Inventors: Chien, Kuo-Lung
• Application Number:
  US11/551,251
• Publication Number:
  US 20080098282A1
• Time in Patent Office: Days
• US Class Current: 714/769
• CPC Class Codes: G11B 20/1833 by adding special lists or symbols to the coded information G11B20/1806, G11B20/1866 take precedence
• CPC Class Codes: G11B 2020/1062 Data buffering arrangements, e.g. recording or playback buffers
• CPC Class Codes: G11B 2020/1853 using a product code which has inner and outer parity symbols

Abstract

Disclosed is an error correcting system, which comprises: a demodulator, for receiving and demodulating data from the optical disc to generate input data; a data buffer, for storing the input data; an on the fly ECC decoder, for performing a PI error correction to the input data before the input data from the demodulator stored by the buffer; an ECC decoder, for performing an error correction on the input data in the data buffer to generate an error correction information and correcting the input data to transform it to corrected data; an non-linear EDC check device, for performing a non linear error detection on the input data to generate a first EDC result stored by the EDC memory; an EDC corrector, for adjusting the first EDC result according to the error correction information; wherein the ECC decoder first performs a PO error correction on the input data.

Claims

1. An error correcting system for correcting errors in data from an optical disc, comprising:

a demodulator, for receiving and demodulating data from the optical disc to generate input data;

a data buffer, coupled to the demodulator, for storing the input data;

an on the fly ECC decoder, coupled to the demodulator and the buffer, for performing a PI error correction to the input data before the input data from the demodulator stored by the buffer;

an ECC decoder, coupled to the data buffer, for performing an error correction on the input data in the data buffer to generate an error correction information and correcting the data in the data buffer to transform the input data to corrected data;

an non-linear EDC check device, for performing a non linear error detection on the input data to generate a first EDC result;

an EDC memory, coupled to the non-linear EDC check device, for storing the first EDC result; and

an EDC corrector, coupled to the ECC decoder and the EDC memory, for adjusting the first EDC result according to the error correction information to generate a final EDC result;

wherein the ECC decoder first performs a PO error correction on the input data.

2. The error correcting system of claim 1, wherein the ECC decoder alternately performs a PO error correction and a PI error correction on the input data until the final EDC result associated with the input data is equal to a predetermined value.

3. The error correcting system of claim 1, further comprising a decision circuit, coupled to the EDC memory, for deciding whether the input data should be outputted or not according to the final EDC result stored in the EDC memory.

4. The error correcting module of claim 1, wherein the EDC corrector is used for performing an error detection on the error parts of the corrected data to get an error corrected EDC result, and the EDC memory comprises:

a first memory device for storing the first EDC result from the non-linear EDC check device;

a second memory device for storing the error corrected EDC result from the EDC corrector; and

a computing unit, coupled to the first memory device and the second memory device to perform a calculating operation for the error corrected EDC result and the first EDC result to generate the final EDC result.

5. The error correcting module of claim 1, wherein the column length of the input data is longer than one byte and the EDC check device includes:

a column EDC module, for detecting errors for symbols of the input data in columns; and

a row EDC module, for performing a column changing operation while the operation of the column EDC module is changed from one column to another column.

6. The error correcting module of claim 1, wherein the row length of the input data is smaller than 172 bytes and the EDC check device includes:

a row EDC module, for detecting errors for symbols of the input data in rows; and

a column EDC module, for performing a row changing operation while the operation of the row EDC module is changed from one row to another row.

7. The error correcting module of claim 1, wherein when the input data is from an HD-DVD, the input data is separated in different kinds of ECC blocks, and the non-linear EDC check device performs the error detection on the different kinds of ECC blocks respectively to generate detecting results and merge the detecting results to generate the first EDC result.

8. An error correcting method for correcting errors in data from an optical disc, comprising:

(a) receiving and demodulating data from the optical disc to generate input data;

(b) storing the input data from the step (a);

(c) performing a PI error correction on the input data before the input data is stored;

(d) performing an error correction on the input data in the data buffer to generate an error correction information, correcting the data in the data buffer to transform the input data to corrected data;

(e) performing a non linear error detection on the input data to generate a first EDC result;

(f) storing the first EDC result; and

(g) adjusting the first EDC result according to the error correction information.

9. The error correcting method of claim 8, wherein the step (b) alternately performs a PO error correction and a PI error correction on the input data until the final EDC result associated with the input data is equal to a predetermined value.

10. The error correcting method of claim 8, further comprising deciding whether the input data should be outputted or not according to the EDC result.

11. The error correcting method of claim 8, wherein the column length of the input data is longer than one byte and the non-linear EDC check device includes:

detecting errors for symbols of the input data in columns; and

performing a column changing operation where the operation of the column EDC module is changed from one column to another column.

12. The error correcting module of claim 8, wherein the row length of the input data is smaller than 172 bytes and the non-linear EDC check device includes:

detecting errors for symbols of the input data in rows; and

performing a row changing operation while the operation of the row EDC module is changed from one row to another row.

13. The error correcting method of claim 8, wherein when the input data is from an HD-DVD, the input data is separated in different kinds of ECC blocks, and the non-linear EDC check device performs the error detection on the different kinds of ECC blocks respectively to generate detecting results and merge the detecting results to generate the EDC result.

14. The error correcting method of claim 8, further comprising:

performing an error corrected EDC according to the error correction information to generate an error corrected EDC result;

storing the error corrected EDC result;

storing the first EDC result from the step (e); and

performing a calculating operation for the error corrected EDC result and the first EDC result to generate the final EDC result.