Inductor structure

• US 20080100408A1
• Filed: 02/26/2007
• Published: 05/01/2008
• Est. Priority Date: 10/25/2006
• Status: Abandoned Application

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Chen, Chih-Hua
• Application Number:
  US11/679,138
• Publication Number:
  US 20080100408A1
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 17/0013 with stacked layers
• CPC Class Codes: H01F 2017/0073 with a special conductive pattern, e.g. flat spiral
• CPC Class Codes: H01F 27/34 Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An inductor structure is disclosed in the present invention. The inductor structure is formed in a semiconductor substrate, in which a spiral first conductive layer and the topmost interconnect of a multilevel interconnection structure are simultaneously formed in a first dielectric layer, the first conductive layer has the same material as the topmost interconnect has, a second conductive layer and the via plug of the multilevel interconnection structure are simultaneously formed, the second conductive layer is filled in a trench opening in a second dielectric layer, beneath the first conductive layer, and attached to the bottom of the first conductive layer to become an integrated whole. Thus, the cross-sectional area of the conductive layer of the coil is increased and the resistance can be reduced to obtain higher Q factor.

Claims

1. An inductor structure, located in a semiconductor substrate, the semiconductor substrate comprising a topmost interconnect in a first dielectric layer, a second dielectric layer under the first dielectric layer, and at least one via in the second dielectric layer and filled with a via plug connecting the topmost interconnect, the inductor structure comprising:

a first conductive layer in a spiral shape filled in a trench opening in the first dielectric layer and comprising a same material as the topmost interconnect; and

a second conductive layer in the second dielectric layer beneath the first conductive layer and connecting the bottom of the first conductive layer with its top, the second conductive layer having a same shape as the spiral shape and comprising a same material as the via plug.

2. The inductor structure as claimed in claim 1, wherein the first conductive layer and the second conductive layer comprises copper and a barrier layer is disposed between the first conductive layer and the first dielectric layer and between the second conductive layer and the second dielectric layer.

3. The inductor structure as claimed in claim 1, wherein the first dielectric layer and the second dielectric layer are formed to be a single layer.

4. The inductor structure as claimed in claim 1, wherein the first conductive layer and the second conductive layer comprise aluminum.

5. The inductor structure as claimed in claim 1, wherein the first conductive layer comprises copper and the second conductive layer comprise tungsten.

6. The inductor structure as claimed in claim 1, wherein the first conductive layer is a plurality of conductive layers respectively filled in a plurality of trench openings parallel in the first dielectric layer.

7. The inductor structure as claimed in claim 1, wherein, the semiconductor substrate has a multilevel interconnection structure and comprises a third dielectric layer beneath the second dielectric layer and a second interconnect in the third dielectric layer;

and

the inductor structure further comprises a third conductive layer filled in a trench opening in the third dielectric layer beneath the second conductive layer and connecting the bottom of the second conductive layer with its top, the third conductive layer having a same shape as the spiral shape and comprising a same material as the second interconnect.

8. The inductor structure as claimed in claim 7, wherein, the semiconductor substrate further comprises a fourth dielectric layer beneath the third dielectric layer and at least one via plug disposed in the fourth dielectric layer;

and

the inductor structure further comprises a fourth conductive layer in the fourth dielectric layer beneath the third conductive layer and connecting the bottom of the third conductive layer with its top, the fourth conductive layer having a same shape as the spiral shape and comprising a same material as the via plug.

9. The inductor structure as claimed in claim 8, wherein, the semiconductor substrate further comprises a fifth dielectric layer beneath the fourth dielectric layer and a third interconnect in the fifth dielectric layer;

and the inductor structure further comprises a fifth conductive layer filed in a trench opening in the fifth dielectric layer beneath the fourth conductive layer and connecting the bottom of the fourth conductive layer with its top, the fifth conductive layer having a same shape as the spiral shape and comprising a same material as the third interconnect.