Group III nitride based semiconductor and production method therefor

• US 20080105903A1
• Filed: 10/24/2007
• Published: 05/08/2008
• Est. Priority Date: 10/24/2006
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: Kabushiki Kaisha Toyota Chuo Kenkyusho (Toyota Motor Corporation), Toyota Jidosha Kabushiki Kaisha (Toyota Motor Corporation)
• Inventors: SUGIMOTO, Masahiro, HAYSASHI, Eiko, KODAMA, Masahito
• Granted Patent: US 7,696,071 B2
• Time in Patent Office: Days
• US Class Current: 257/201
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/0265 Pendeoepitaxy

Abstract

The invention provides a method for producing a group III nitride based semiconductor having a reduced number of crystal defects.

A GaN layer 2 is epitaxially grown on a sapphire substrate 1 having C-plane as a main plane (FIG. 1A). Then, the layer is wet-etched by use of a 25% aqueous TMAH solution at 85° C. for one hour, to thereby form an etch pit 4 (FIG. 1B) Then, a GaN layer 5 is grown on the GaN layer 2 through the ELO method (FIG. 1C). The thus-formed GaN layer 5 has a screw dislocation density lower than that of the GaN layer 2.

Claims

1. A method for producing a group III nitride based semiconductor, characterized in that the method comprises

a step of wet-etching an upper surface of a first layer comprising a first group III nitride based semiconductor with an aqueous TMAH solution, to thereby form an etch pit, and

a step of forming, on the upper surface of the first layer, a second layer comprising a second group III nitride based semiconductor so that an upper portion of the etch pit is filled with the second layer.

2. A method for producing a group III nitride based semiconductor according to claim 1, wherein a main plane for crystal growth of the first layer is C-plane.

3. A method for producing a group III nitride based semiconductor according to claim 1, wherein the first group III nitride based semiconductor forming the first layer and the second group III nitride based semiconductor forming the second layer have the same composition.

4. A method for producing a group III nitride based semiconductor according to claim 2, wherein the first group III nitride based semiconductor forming the first layer and the second group III nitride based semiconductor forming the second layer have the same composition.

5. A method for producing a group III nitride based semiconductor according to claim 1, wherein the second layer is formed through the ELO method.

6. A method for producing a group III nitride based semiconductor according to claim 2, wherein the second layer is formed through the ELO method.

7. A method for producing a group III nitride based semiconductor according to claim 3, wherein the second layer is formed through the ELO method.

8. A method for producing a group III nitride based semiconductor according to claim 1, wherein the etch pit has a diameter of 1 μ

m or more.

9. A method for producing a group III nitride based semiconductor according to claim 2, wherein the etch pit has a diameter of 1 μ

m or more.

10. A method for producing a group III nitride based semiconductor according to claim 3, wherein the etch pit has a diameter of 1 μ

m or more.

11. A method for producing a group III nitride based semiconductor according to claim 1, wherein the second layer is formed so that the etch pit is entirely or partially filled with the second layer, and the method further includes, after the step of forming the second layer, a step of removing a portion of the second layer which is present above the first layer.

12. A method for producing a group III nitride based semiconductor according to claim 2, wherein the second layer is formed so that the etch pit is entirely or partially filled with the second layer, and the method further includes, after the step of forming the second layer, a step of removing a portion of the second layer which is present above the first layer.

13. A method for producing a group III nitride based semiconductor according to claim 3, wherein the second layer is formed so that the etch pit is entirely or partially filled with the second layer, and the method further includes, after the step of forming the second layer, a step of removing a portion of the second layer which is present above the first layer.

14. A group III nitride based semiconductor, having a structure including a first layer comprising a first group III nitride based semiconductor and a second layer comprising a second group III nitride based semiconductor which layer is formed on an upper surface of the first layer, characterized in that

the first layer has C-plane as a main plane;

the first layer contains a hexagonal-prismatic etch pit formed therein; and

the second layer is formed so that an upper portion of the etch pit is filled with the second layer.

15. A group III nitride based semiconductor according to claim 14, wherein the first group III nitride based semiconductor forming the first layer and the second group III nitride based semiconductor forming the second layer have the same composition.