SIGNAL PROCESSING SYSTEM AND METHOD
First Claim
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1. A method of processing a signal responsive to a self-impedance of a circuit element, comprising:
- a. generating first and second complementary voltage signals, wherein said first and second complementary voltage signals comprise respective first and second oscillatory voltage signals having a nominal peak amplitude, and said second oscillatory voltage signal comprises a waveform of said first oscillatory voltage signal shifted in phase by substantially 180 degrees;
b. operatively coupling said first complementary voltage signal to a first node of a series circuit;
c. operatively coupling said second complementary voltage signal to a fourth node of said series circuit, wherein said series circuit comprises;
i) a first sense resistor between said first node and a second node; and
ii) a second sense resistor between a third node and said fourth nodes, wherein said series circuit is completed by connecting said second and third nodes to the circuit element;
d. detecting a signal responsive to a DC bias current in said series circuit;
e. controlling at least one of said first and second complementary voltage signals so as to substantially null said signal responsive to said DC bias current in said series circuit; and
f. generating an output signal responsive to at least one of a voltage across said first sense resistor and a voltage across said second sense resistor, wherein said output signal is responsive to the self-impedance of said circuit element when said circuit element is connected to said second and third nodes of said series circuit.
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Abstract
First and second complementary voltage signals are operatively coupled across a series circuit comprising first and second sense resistors and a circuit element therebetween. A DC bias current in the series circuit is substantially nulled, and an output signal responsive to the self-impedance of the circuit element is generated responsive at least one of a voltage across the first sense resistor and a voltage across the second sense resistor.
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Citations
25 Claims
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1. A method of processing a signal responsive to a self-impedance of a circuit element, comprising:
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a. generating first and second complementary voltage signals, wherein said first and second complementary voltage signals comprise respective first and second oscillatory voltage signals having a nominal peak amplitude, and said second oscillatory voltage signal comprises a waveform of said first oscillatory voltage signal shifted in phase by substantially 180 degrees;
b. operatively coupling said first complementary voltage signal to a first node of a series circuit;
c. operatively coupling said second complementary voltage signal to a fourth node of said series circuit, wherein said series circuit comprises;
i) a first sense resistor between said first node and a second node; and
ii) a second sense resistor between a third node and said fourth nodes, wherein said series circuit is completed by connecting said second and third nodes to the circuit element;
d. detecting a signal responsive to a DC bias current in said series circuit;
e. controlling at least one of said first and second complementary voltage signals so as to substantially null said signal responsive to said DC bias current in said series circuit; and
f. generating an output signal responsive to at least one of a voltage across said first sense resistor and a voltage across said second sense resistor, wherein said output signal is responsive to the self-impedance of said circuit element when said circuit element is connected to said second and third nodes of said series circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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Specification