Display device, method for driving the same, and electronic apparatus

• US 20080111766A1
• Filed: 10/22/2007
• Published: 05/15/2008
• Est. Priority Date: 11/13/2006
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Tanikame, Takao, Uchino, Katsuhide, Yamashita, Junichi
• Granted Patent: US 7,511,689 B2
• Time in Patent Office: Days
• US Class Current: 345/55
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

A display device includes a pixel array unit and a peripheral circuit unit. The pixel array unit includes first scanning lines arranged in rows; second scanning lines arranged in rows; signal lines arranged in columns; and pixels arranged in a matrix pattern at intersections of the scanning lines and the signal lines. The peripheral circuit unit includes a first scanner to supply first control pulses to the first scanning lines; a second scanner to supply second control pulses to the second scanning lines; and a signal driver to supply video signals to the signal lines. Each of the pixels includes at least a sampling transistor; a driving transistor; an emission time controlling transistor; a holding capacitance; and a light-emitting element.

Claims

1. A display device comprising:

a pixel array unit; and

a peripheral circuit unit,

the pixel array unit including

first scanning lines arranged in rows;

second scanning lines arranged in rows;

signal lines arranged in columns; and

pixels arranged in a matrix pattern at intersections of the scanning lines and the signal lines,

the peripheral circuit unit including

a first scanner to supply first control pulses to the first scanning lines;

a second scanner to supply second control pulses to the second scanning lines; and

a signal driver to supply video signals to the signal lines,

each of the pixels including at least

a sampling transistor;

a driving transistor;

an emission time controlling transistor;

a holding capacitance; and

a light-emitting element,

the sampling transistor being turned ON in accordance with the first control pulse, sampling the video signal, and allowing the holding capacitance to hold the video signal,

the driving transistor controlling a drive current in accordance with a potential of the video signal held in the holding capacitance,

the emission time controlling transistor being turned ON in accordance with the second control pulse and supplying the drive current controlled by the driving transistor to the light-emitting element, and

the light-emitting element emitting light by receiving the drive current while the emission time controlling transistor is in an ON state,

wherein the drive current is negatively fed back to the holding capacitance in a correcting period from a first timing when the emission time controlling transistor is turned ON after the sampling transistor has been turned ON to a second timing when the sampling transistor is turned OFF, thereby correcting variations in mobility of the driving transistor among the pixels,

wherein the first scanner forms an edge of the first control pulse defining the second timing by using a first enable signal supplied from the outside, and

wherein the second scanner forms an edge of the second control pulse defining the first timing by using a second enable signal supplied from the outside.

2. The display device according to claim 1,

wherein the correcting period is optimized by adjusting a phase difference between the first enable signal and the second enable signal.

3. The display device according to claim 1,

wherein each of the pixels has correcting means for correcting variations in threshold voltage of the driving transistor among the pixels.

4. An electronic apparatus including the display device according to claim 1.

5. A method for driving a display device including a pixel array unit and a peripheral circuit unit, the pixel array unit including first scanning lines arranged in rows;

second scanning lines arranged in rows;

signal lines arranged in columns; and

pixels arranged in a matrix pattern at intersections of the scanning lines and the signal lines, the peripheral circuit unit including a first scanner to supply first control pulses to the first scanning lines;

a second scanner to supply second control pulses to the second scanning lines; and

a signal driver to supply video signals to the signal lines, each of the pixels including at least a sampling transistor;

a driving transistor;

an emission time controlling transistor;

a holding capacitance; and

a light-emitting element, the method comprising;

turning ON the sampling transistor in accordance with the first control pulse, sampling the video signal from the signal line, and allowing the holding capacitance to hold the video signal,

controlling, by the driving transistor, a drive current in accordance with a potential of the video signal held in the holding capacitance,

turning ON the emission time controlling transistor in accordance with the second control pulse and supplying the drive current controlled by the driving transistor to the light-emitting element,

emitting, by the light-emitting element, light by receiving the drive current while the emission time controlling transistor is in an ON state,

negatively feeding back the drive current to the holding capacitance in a correcting period from a first timing when the emission time controlling transistor is turned ON after the sampling transistor has been turned ON to a second timing when the sampling transistor is turned OFF, thereby correcting variations in mobility of the driving transistor among the pixels,

forming, by the first scanner, an edge of the first control pulse defining the second timing by using a first enable signal supplied from the outside, and

forming, by the second scanner, an edge of the second control pulse defining the first timing by using a second enable signal supplied from the outside.