HERMETIC SEALING OF MICRO DEVICES

• US 20080112037A1
• Filed: 11/10/2006
• Published: 05/15/2008
• Est. Priority Date: 11/10/2006
• Status: Abandoned Application

• Current Assignee: Spatial Photonics Incorporated (Himax Technologies Incorporated)
• Original Assignee: Spatial Photonics Incorporated (Himax Technologies Incorporated)
• Inventors: Pan, Shaoher X., Novotny, Vlad
• Application Number:
  US11/558,888
• Publication Number:
  US 20080112037A1
• Time in Patent Office: Days
• US Class Current: 359/291
• CPC Class Codes: B81B 2203/0384 sloped profile
• CPC Class Codes: B81C 1/00293 maintaining a controlled atmosphere with processes not provided for in B81C1/00285
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: H01L 23/041 the container being a hollow construction having no base used as a mounting for the semiconductor body
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]

Abstract

A method for packaging a micro device includes encapsulating a micro device in a chamber on a substrate, wherein the chamber is defined by spacer walls and an encapsulation cover, removing a portion of the encapsulation cover and portions of the spacer walls to expose a surfaces of the spacer walls, and forming a layer of a sealing material on the exposed surfaces of the spacer walls to hermetically seal the micro device in the chamber.

Claims

1. A method for packaging a micro device, comprising:

encapsulating a micro device in a chamber on a substrate, wherein the chamber is defined by spacer walls and an encapsulation cover;

removing a portion of the encapsulation cover and portions of the spacer walls to expose a surface of the spacer walls; and

forming a layer of a sealing material on the exposed surface of the spacer walls to hermetically seal the micro device in the chamber.

2. The method of claim 1, wherein the exposed surface of the spacer walls comprises a surface that is sloped relative to the substrate.

3. The method of claim 2, wherein the step of forming comprises depositing the sealing material on the surface that is sloped relative to the substrate.

4. The method of claim 1, wherein the step of removing comprises cutting the encapsulation cover and the portions of the spacers.

5. The method of claim 1, wherein the spacer walls comprise a low out-gassing material.

6. The method of claim 5, wherein the spacer walls comprise epoxy, glass, metal or silicon.

7. The method of claim 1, wherein at least a portion of the encapsulation cover is transparent to visible, UV, or IR light.

8. The method of claim 1, wherein the encapsulation cover comprises an opaque aperture layer having an opening over the micro device.

9. The method of claim 1, further comprising:

forming a layer of sacrificial material on the encapsulation cover before the step of removing; and

removing the layer of sacrificial material and the sealing material on the sacrificial material, wherein forming the layer of the sealing material includes forming the layer of sealing material on the sacrificial material and the exposed surface of the spacer walls to hermetically seal the micro device in the chamber.

10. The method of claim 1, further comprising:

cutting a portion of the substrate; and

separating the chamber encapsulating the micro device from an adjacent chamber encapsulating an adjacent micro device on the substrate.

11. The method of claim 10, further comprising removing a portion of the spacer wall and a portion of the encapsulation cover to expose an electric contact on the substrate, where the electric contact is configured to send an electric signal to or receive an electric signal from the micro device.

12. The method of claim 11, wherein the step of removing comprises dissolving a portion of the spacer wall or an adhesive bonding the spacer wall and the substrate.

13. An encapsulated micro device on a substrate, comprising:

a micro device on a substrate within a chamber;

an encapsulation cover in part defining the chamber;

a spacer wall between the substrate and the encapsulation cover, wherein the spacer wall has an inner surface adjacent to the micro device and an outer surface opposite to the inner surface, wherein the outer surface is sloped relative to the substrate; and

a sealing material on the outer surface of the spacer wall, hermetically sealing the chamber.

14. The encapsulated micro device of claim 13, wherein the spacer wall comprises a low out-gassing and low permeability material.

15. The encapsulated micro device of claim 14, wherein the spacer wall comprises epoxy or glass.

16. The encapsulated micro device of claim 13, wherein the encapsulation cover is transparent to visible, UV, or IR light.

17. The encapsulated micro device of claim 13, further comprising an opaque aperture layer on the encapsulation cover, wherein the opaque aperture layer comprises an opening over a portion of the encapsulation cover above the micro device.

18. The encapsulated micro device of claim 13, wherein the micro device comprises a tiltable mirror.

19. The encapsulated micro device of claim 13, further comprising an electric contact on the substrate, where the electric contact is configured to send an electric signal to or receive an electric signal from the micro device.

20. The encapsulated micro device of claim 19, wherein the electric contacts and the micro devices are positioned on a single surface of the substrate.

21. The encapsulated micro device of claim 19, wherein the electric contacts are positioned on a surface of the substrate that is opposite to a surface of the substrate on which the micro devices are positioned.