Semiconductor device and method for manufacturing the same

• US 20080116500A1
• Filed: 11/13/2007
• Published: 05/22/2008
• Est. Priority Date: 11/17/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tokunaga, Hajime
• Granted Patent: US 8,759,946 B2
• Time in Patent Office: Days
• US Class Current: 257/314
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02491 Conductive materials
• CPC Class Codes: H01L 21/02496 Layer structure
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/02529 Silicon carbide
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02543 Phosphides
• CPC Class Codes: H01L 21/02546 Arsenides
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/0256 Selenides
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/02672 using crystallisation enhancing elements
• CPC Class Codes: H01L 21/02683 Continuous wave laser beam
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 : comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1255 : integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1266 : the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H10B 20/20 : Programmable ROM [PROM] devices comprising field-effect components H10B20/10 takes precedence

Abstract

A semiconductor device which does not reduce writing property of a memory element and a method for manufacturing the same are proposed even in the case of forming a silicon film at a step portion formed by a surface of a substrate and a wiring formed over the substrate. The semiconductor device includes a plurality of the memory elements comprising a first electrode formed over a substrate having an insulating surface, sidewall insulating layer formed on side surface of the first electrode, a silicon film formed to cover the first electrode and the sidewall insulating layer, and a second electrode formed over the silicon film, and at least one of the first electrode and the second electrode is formed with a material being capable of being alloyed with the silicon film.

Claims

1. A semiconductor device including a memory element, the memory element comprising:

a first electrode formed over a substrate with an insulating surface;

a sidewall insulating layer formed on a side surface of the first electrode;

a layer formed over the first electrode and the sidewall insulating layer; and

a second electrode formed over the first electrode with the layer interposed therebetween;

wherein the memory element is capable of changing its state from a first state to a second state upon an application of a voltage, where a resistance between the first and second electrodes is higher in the first state than in the second state.

2. The semiconductor device according to claim 1,

wherein the layer is a semiconductor layer, and

wherein at least one of the first electrode and the second electrode comprises a material being capable of being alloyed with the semiconductor layer.

3. The semiconductor device according to claim 1,

wherein the sidewall insulating layer has a curved surface, and

wherein the sidewall insulating layer is contact with the semiconductor layer at the curved surface.

4. The semiconductor device according to claim 1, wherein at least one of the first electrode and the second electrode comprises a material including at least one of elements selected from Ti, W, Ni, Cr, Mo, Ta, Co, Zr, V, Pd, Hf, Pt, and Fe.

5. The semiconductor device according to claim 1, wherein the substrate with the insulating surface is a glass substrate, a plastic substrate, a semiconductor substrate, or a sheet of paper.

6. A semiconductor device including a plurality of thin film transistors and a plurality of memory elements formed over a substrate with an insulating surface, the memory element comprising;

a first electrode formed over the substrate with the insulating surface;

a sidewall insulating layer formed on a side surface of the first electrode;

a semiconductor layer formed over the first electrode and the sidewall insulating layer; and

a second electrode formed over the first electrode with the layer interposed therebetween;

wherein a gate electrode of the thin film transistor comprises a same material as the first electrode of the memory element,

wherein at least one of a source and drain electrode of the thin film transistor comprises a same material as the second electrode of the memory element, and

wherein at least one of the first electrode and the second electrode of the memory element comprises a material being capable of being alloyed with the semiconductor layer.

7. The semiconductor device according to claim 6,

wherein the sidewall insulating layer has a curved surface, and

wherein the sidewall insulating layer is contact with the semiconductor layer at the curved surface.

8. The semiconductor device according to claim 6, wherein at least one of the first electrode and the second electrode comprises a material including at least one of elements selected from Ti, W, Ni, Cr, Mo, Ta, Co, Zr, V, Pd, Hf, Pt, and Fe.

9. The semiconductor device according to claim 6, wherein the substrate with the insulating surface is a glass substrate, a plastic substrate, a semiconductor substrate, or a sheet of paper.

10. The semiconductor device according to claim 6, further comprising a second sidewall insulating layer formed on a side surface of the gate electrode.

11. The semiconductor device according to claim 6, further comprising:

a connection electrode electrically connected to the thin film transistor; and

an antenna electrically connected to the connection electrode;

wherein the connection electrode comprises a same material as at least one of the second electrode of the memory element and a source and drain electrode of the thin film transistor.

12. A method for manufacturing a semiconductor device including a memory element, comprising the steps of:

forming a first electrode over a substrate with an insulating surface;

forming a sidewall insulating layer on a side surface of the first electrode;

forming a semiconductor layer over the first electrode and the sidewall insulating layer;

forming a second electrode over the semiconductor layer; and

wherein the memory element is capable of changing its state from a first state to a second state upon an application of a voltage, where a resistance between the first and second electrodes is higher in the first state than in the second state.

13. The method for manufacturing the semiconductor device according to claim 12,

wherein the layer is a semiconductor layer, and

wherein at least one of the first electrode and the second electrode comprises a material being capable of being alloyed with the semiconductor layer.

14. The method for manufacturing the semiconductor device according to claim 12,

wherein the sidewall insulating layer has a curved surface, and

wherein the sidewall insulating layer is contact with the semiconductor layer at the curved surface.

15. The method for manufacturing the semiconductor device according to claim 12, wherein at least one of the first electrode and the second electrode comprises a material including at least one of elements selected from Ti, W, Ni, Cr, Mo, Ta, Co, Zr, V, Pd, Hf, Pt, and Fe.

16. The method for manufacturing a semiconductor device according to claim 12, wherein the substrate with the insulating surface is a glass substrate, a plastic substrate, a semiconductor substrate, or a sheet of paper.

17. A method for manufacturing a semiconductor device including a plurality of thin film transistors and a plurality of memory elements over one substrate comprising the steps of:

forming a first and second semiconductor islands over a substrate with an insulating surface;

forming a first insulating film over the first and second semiconductor islands;

forming a first electrode over the first semiconductor island with the first insulating layer interposed therebetween;

forming a second electrode over the semiconductor island with the first insulating film interposed therebetween;

forming a sidewall insulating layer on a side surface of the second electrode;

etching the first insulating film to expose a part of the second semiconductor island;

forming a second insulating film covering the first electrode, the second electrode, and the sidewall insulating layer;

etching the second insulating film to form a first opening which exposes the second electrode the sidewall insulating layer, and the second semiconductor layer;

forming a third semiconductor layer over the second electrode and the sidewall insulating layer;

etching the second insulating film to form a second opening which exposes a part of the first semiconductor layer;

forming a third electrode over the second semiconductor layer;

forming a fourth electrode over the first semiconductor layer; and

wherein at least one of the second and third electrode comprises a material being capable of being alloyed with the third semiconductor layer.

18. The method for manufacturing the semiconductor device according to claim 17,

wherein the sidewall insulating layer has a curved surface, and

wherein the sidewall insulating layer is contact with the semiconductor layer at the curved surface.

19. The method for manufacturing the semiconductor device according to claim 17, wherein at least one of the first electrode and the second electrode comprises a material including at least one of elements selected from Ti, W, Ni, Cr, Mo, Ta, Co, Zr, V, Pd, Hf, Pt, and Fe.

20. The method for manufacturing a semiconductor device according to claim 17, wherein the substrate with the insulating surface is a glass substrate, a plastic substrate, a semiconductor substrate, or a sheet of paper.

21. The method for manufacturing a semiconductor device according to claim 17, further comprising the step of forming a second sidewall insulating layer formed on a side surface of the first electrode.

22. The method for manufacturing a semiconductor device according to claim 17, wherein the first and second electrodes are manufactured in the same step.

23. The method for manufacturing a semiconductor device according to claim 17, wherein the third and fourth electrodes are manufactured in the same step.

24. The method for manufacturing a semiconductor device according to claim 17, wherein a fifth electrode is formed over the second insulating film in the same step of forming the third and fourth electrodes, and further an antenna electrically connected to the fifth electrode is formed over the fifth electrode.

25. The method for manufacturing a semiconductor device according to claim 17, wherein the memory element is formed of the second electrode, the third semiconductor layer, and the t third electrode.

26. The method for manufacturing a semiconductor device according to claim 17, wherein the thin film transistor is formed of the first semiconductor layer, the first electrode, and the fourth electrode.

27. The method for manufacturing the semiconductor device according to claim 17, wherein the first electrode serves as a gate electrode of the thin film transistor, the first insulating film serves as a gate insulating film thereof, and the fourth electrode serves as source or drain electrodes thereof.

28. A driving method for a semiconductor device including a memory element, the memory element comprising:

a first electrode formed over a substrate with an insulating surface;

a sidewall insulating layer formed on a side surface of the first electrode;

a layer formed over the first electrode and the sidewall insulating layer; and

a second electrode formed over the first electrode with the layer interposed therebetween;

the method comprising the step of applying a voltage between the first electrode and the second electrode of the memory element so that the memory element changes its state from a first state to a second state, where a resistance between the first and second electrodes is higher in the first state than in the second state.

29. A driving method for a semiconductor device according to claim 28,

wherein the layer is a semiconductor layer, and

wherein at least one of the first electrode and the second electrode comprises a material being capable of being alloyed with the semiconductor layer.

30. A driving method for a semiconductor device according to claim 28,

wherein the sidewall insulating layer has a curved surface, and

wherein the sidewall insulating layer is contact with the semiconductor layer at the curved surface.

31. A driving method for a semiconductor device according to claim 28, wherein at least one of the first electrode and the second electrode comprises a material including at least one of elements selected from Ti, W, Ni, Cr, Mo, Ta, Co, Zr, V, Pd, Hf, Pt, and Fe.

32. A driving method for a semiconductor device according to claim 28, wherein the substrate with the insulating surface is a glass substrate, a plastic substrate, a semiconductor substrate, or a sheet of paper.