CMOS IMAGER ARRAY WITH RECESSED DIELECTRIC
First Claim
1. A CMOS imager array comprising:
- a substrate;
an array of light receiving pixel structures formed above said substrate, said array having formed therein “
m”
levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer;
a dense logic wiring region formed adjacent to said array of light receiving pixel structures having “
n”
levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer, where n>
m.
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Abstract
A CMOS image sensor array and method of fabrication. The CMOS imager sensor array comprises a substrate; an array of light receiving pixel structures formed above the substrate, the array having formed therein “m” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer; a dense logic wiring region formed adjacent to the array of light receiving pixel structures having “n” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer, where n>m. A microlens array having microlenses and color filters formed above the interlevel dielectric material layer, a microlens and respective color filter in alignment with a respective light receiving structure formed at a surface of the substrate. A top surface of the interlevel dielectric material layer beneath the microlens array is recessed from a top surface of the interlevel dielectric material layers of the dense logic wiring region.
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Citations
26 Claims
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1. A CMOS imager array comprising:
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a substrate; an array of light receiving pixel structures formed above said substrate, said array having formed therein “
m”
levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer;a dense logic wiring region formed adjacent to said array of light receiving pixel structures having “
n”
levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer, where n>
m. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method for fabricating an image sensor array of pixels comprising the steps of:
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forming a plurality of light sensitive elements in a semiconductor substrate to form a pixel array region of said sensor array; forming a stack of “
m”
interlevel dielectric material layers atop said substrate in both said pixel array region of said sensor array and an adjacent dense wiring logic region of said sensor array, each said “
m”
interlevel dielectric material layers including a respective metal interconnect level comprising a conductor structure in both said pixel array region of said sensor array and said adjacent dense wiring logic region of said sensor array;forming a stack of additional interlevel dielectric layers atop said “
m”
interlevel dielectric material layers over both said pixel array region and said dense logic wiring region, said stack of additional interlevel dielectric layers formed in said adjacent dense logic wiring region including respective additional metal interconnect levels including additional metal level conductor structures formed only in said adjacent dense logic wiring region, wherein a total of “
n”
metal interconnect levels having conductive structures is formed in said adjacent dense logic wiring region, wherein n>
m;removing a portion of said additional interlevel dielectric layers formed atop pixel array region whereby a surface of said additional interlevel dielectric layers in said pixel array region is recessed from a top surface of said additional interlevel dielectric material layers of said dense logic wiring region; and
,forming a microlens array having microlenses and color filters above said recessed surface of said interlevel dielectric material layer in said pixel array region, a microlens and respective color filter in alignment with a respective light sensitive element. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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Specification