True-differential DVI/HDMI line driver

• US 20080116943A1
• Filed: 12/05/2006
• Published: 05/22/2008
• Est. Priority Date: 11/20/2006
• Status: Abandoned Application

• Current Assignee: Rajendran Nair
• Original Assignee: Rajendran Nair
• Inventors: Nair, Rajendran
• Application Number:
  US11/633,879
• Publication Number:
  US 20080116943A1
• Time in Patent Office: Days
• US Class Current: 327/108
• CPC Class Codes: H03K 19/018528 with at least one differential stage
• CPC Class Codes: H04L 25/0272 Arrangements for coupling to multiple lines, e.g. for differential transmission
• CPC Class Codes: H04L 25/0282 Provision for current-mode coupling
• CPC Class Codes: H04L 25/085 Arrangements for reducing interference in line transmission systems, e.g. by differential transmission

Abstract

A novel source-coupled differential driver circuit fully compatible with digital visual interface (DVI/HDMI) signaling specification is disclosed. Driven output signals are connected to the source terminals of driving switches in the invention circuit, minimizing the detrimental impact of miller coupling capacitance between gate nodes and driven output nodes upon output slew-rate, enabling higher frequencies of operation. Undriven output wires are connected to source-termination impedances, providing a matched return current to the driven current signal, and reducing return path impedance substantially. Matched differential current drive from the source ensures true-differential signaling, eliminating shield current flow and improving signal integrity. Bit error rate (BER) is reduced and overall link performance is significantly enhanced due to improved slew rates, true-differential signaling and greater signal integrity, enabling long reach and high-speed, high-definition multi-media data transmission.

Claims

1. A line driver for differential signal output, comprising

a current source connecting to a first stable voltage source;

a pair of current-steering metal-oxide-semiconductor field-effect transistors with their drain terminals connecting together and to the current source, and source terminals connecting to the differential output signal nodes of the driver, receiving at their gate inputs a true and complementary differential signal pair;

and a pair of controlled switch devices, each connecting to an output signal node and a current-steering transistor'"'"'s source node at one conducting terminal, and at its other conducting terminal through a transmitter termination impedance to a second stable voltage source, receiving at their control inputs the true and complementary differential signal pair.

2. The apparatus of claim 1, with the differential outputs connecting through a differential signal wire pair to receiver termination impedances attached to a second stable voltage source, employed to generate complementary voltage swings across the receiver termination impedances.

3. The apparatus of claim 2 where the second stable voltage reference and receiver termination impedances are part of a receiver system not containing the line driver apparatus.

4. The apparatus of claim 3 where the terminating impedances are resistors matched to the characteristic impedance of the signal pathways in series with inductors, such that the terminating impedance presented increases with frequency.

5. The apparatus of claim 3, with p-type field-effect transistors employed as current-steering devices and p-type field-effect transistors employed as controlled switch devices.

6. The apparatus of claim 3, with p-type field-effect transistors employed as current-steering devices and transmission gate devices comprised of both p-type and n-type field effect transistors employed as controlled switch devices.

7. The apparatus of claim 5 employed in DVI/HDMI compatible systems and data communication links.

8. The apparatus of claim 7 where a shield conductor connecting to ground at both the line driver and the receiver systems accompanies in close proximity the differential signal wire pairs forming the communication link.

9. The apparatus of claim 8 where the communication link lengths substantially exceed DVI/HDMI specifications.

10. The apparatus of claim 1 where the current source comprises of a controlled transistor with a bias signal provided to its control node and a cascode transistor in series with the controlled transistor with a reference signal provided to its control node.

11. The apparatus of claim 10, with one or more additional cascoded current sources connecting between the current-steering transistors and the first stable voltage source, employed for symbol-dependent drive current modulation.

12. The apparatus of claim 11 employed for de-emphasis signal equalization.

13. The apparatus of claim 11 employed for pre-emphasis signal equalization.

18. Electronic systems comprised of various integrated and discrete electronic circuits and devices that employ the apparatus of claim 1 in any embodiment.

14. A method for differential output signal generation, comprising:

steering a current through a field-effect transistor into a driven output signal wire such that the driving signal steering the current is in phase with the output voltage developed;

while simultaneously activating a switch connecting the complementary output signal wire through terminating impedances or current limiting circuits to a termination reference voltage so as to provide a matched current flow in the complementary output signal wire of a polarity opposite to that of the steered current flow in the driven output signal wire.

15. The method of claim 14 where current flows through a p-type metal-oxide-semiconductor field-effect transistor from an output node to ground, and a p-type MOSFET controlled switch connects the complementary output node through a terminating impedance to a positive reference power supply.

16. The method of claim 14, where the steered current magnitude for a transmitted data bit is dependent upon one or more preceding data bits transmitted.

17. The method of claim 14, where the rate of change of voltage on the driven output node is amplified by coupling a substantial portion of the energy of both the driving signal effecting the current steering and the activating signal input to the controlled switch.

19. Integrated or discrete output driver circuits that employ the method of claim 14 in any of its implementations.