INSPECTION DEVICE AND INSPECTION METHOD FOR ACTIVE MATRIX PANEL, AND MANUFACTURING METHOD FOR ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE PANEL

• US 20080117144A1
• Filed: 10/29/2007
• Published: 05/22/2008
• Est. Priority Date: 05/21/2003
• Status: Active Grant

• Current Assignee: Daiju Nakano, Yoshitami Sakaquchi
• Original Assignee: Daiju Nakano, Yoshitami Sakaquchi
• Inventors: Nakano, Daiju, Sakaquchi, Yoshitami
• Granted Patent: US 8,228,269 B2
• Time in Patent Office: Days
• US Class Current: 345/76
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2330/10 Dealing with defective pixels
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3225 using an active matrix

Abstract

An inspection method includes an array process of forming a TFT array on a substrate to fabricate an active matrix panel, an inspection process of carrying out a performance test on the fabricated active matrix panel, and a cell process of mounting an OLED on the active matrix panel after the inspection process. In the inspection process, variation in parasitic capacitance through a pixel electrode is measured when driving TFTs constituting the active matrix fabricated in the array process are turned on and when the driving TFTs are turned off, and open/short defects in the driving TFTs are thereby inspected.

Claims

1. An inspection device for an active matrix panel for inspecting an active matrix panel prior to formation of an organic light emitting diode, comprising:

voltage changing means for changing a voltage on inspection wiring for a driving thin film transistor constituting the active matrix panel; and

measuring means for measuring a transient current flowing on wiring on a source side of the driving thin film transistor when the voltage on the inspection wiring is changed by the voltage changing means, and for measuring variation in parasitic capacitance between an off state and an on state of the driving thin film transistor.

2. The inspection device for an active matrix panel according to claim 1, wherein the measuring means measures the variation in the parasitic capacitance in all pixels constituting the active matrix panel and finds the number of pixels having any of open and short defects in the driving thin film transistors thereof.

3. The inspection device for an active matrix panel according to claim 1, further comprising:

unevenness estimating means for estimating unevenness caused upon formation of pixel circuits constituting the active matrix panel based on the variation in the parasitic capacitance measured by the measuring means.

4. The inspection device for an active matrix panel according to claim 1, wherein the measuring means measures the transient current by use of an integration circuit connected to the source side wiring and takes an output from the integration circuit into a computer after converting the output into digital data.

20. An inspection device for an active matrix panel for inspecting an active matrix panel prior to formation of an organic light emitting diode according to claim 1, further comprising:

off-state parasitic capacitance measuring means for measuring said parasitic capacitance through a pixel electrode in the off state of a driving thin film transistor constituting the active matrix panel;

on-state parasitic capacitance measuring means for measuring the parasitic capacitance through the pixel electrode in the on state of the driving thin film transistor; and

inspecting means for inspecting any of open and short defects of the driving thin film transistor based on the parasitic capacitance measured by the off-state parasitic capacitance measuring means and the parasitic capacitance measured by the on-state parasitic capacitance measuring means.

21. The inspection device for an active matrix panel according to claim 20, wherein the on-state parasitic capacitance measuring means performs charge pumping through the parasitic capacitance when a gate voltage of the driving thin film transistor has a low initial voltage.

22. The inspection device for an active matrix panel according to claim 20, wherein the on-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an on state, and the inspecting means estimates the number of pixels having open defects in the driving thin film transistors thereof by use of a difference between a maximum value of the estimated parasitic capacitance and individual parasitic capacitance.

23. The inspection device for an active matrix panel according to claim 20, wherein the off-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an off state, and the inspecting means estimates the number of pixels having short defects in the driving thin film transistors thereof by use of a difference between a minimum value of the estimated parasitic capacitance and individual parasitic capacitance.

24. The inspection device for an active matrix panel according to claim 20, wherein the off-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an off state, the on-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of the inspection wiring constituting the active matrix panel while setting the driving thin film transistor of the pixel subjected to alternating-current coupling directly with the corresponding line of the inspection wiring to an on state, and the inspecting means estimates the number of open and short defects on each line of the inspection wiring by use of differences among a minimum value and a maximum value of the estimated parasitic capacitance and individual parasitic capacitance on each line of the inspection wiring.

5. An inspection device for an active matrix panel for inspecting an active matrix panel prior to formation of an organic light emitting diode, comprising:

off-state parasitic capacitance measuring means for measuring parasitic capacitance through a pixel electrode in an off state of a driving thin film transistor constituting the active matrix panel;

on-state parasitic capacitance measuring means for measuring the parasitic capacitance through the pixel electrode in an on state of the driving thin film transistor; and

inspecting means for inspecting any of open and short defects of the driving thin film transistor based on the parasitic capacitance measured by the off-state parasitic capacitance measuring means and the parasitic capacitance measured by the on-state parasitic capacitance measuring means.

6. The inspection device for an active matrix panel according to claim 5, wherein the on-state parasitic capacitance measuring means performs charge pumping through the parasitic capacitance when a gate voltage of the driving thin film transistor has a low initial voltage.

7. The inspection device for an active matrix panel according to claim 5, wherein the on-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an on state, and the inspecting means estimates the number of pixels having open defects in the driving thin film transistors thereof by use of a difference between a maximum value of the estimated parasitic capacitance and individual parasitic capacitance.

8. The inspection device for an active matrix panel according to claim 5, wherein the off-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an off state, and the inspecting means estimates the number of pixels having short defects in the driving thin film transistors thereof by use of a difference between a minimum value of the estimated parasitic capacitance and individual parasitic capacitance.

9. The inspection device for an active matrix panel according to claim 5, wherein the off-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an off state, the on-state parasitic capacitance measuring means estimates the parasitic capacitance on each line of the inspection wiring constituting the active matrix panel while setting the driving thin film transistor of the pixel subjected to alternating-current coupling directly with the corresponding line of the inspection wiring to an on state, and the inspecting means estimates the number of open and short defects on each line of the inspection wiring by use of differences among a minimum value and a maximum value of the estimated parasitic capacitance and individual parasitic capacitance on each line of the inspection wiring.

10-13. -13. (canceled)

14. A manufacturing method for an active matrix organic light emitting diode panel, comprising the steps of:

forming a thin film transistor array on a substrate and thereby fabricating an active matrix panel;

inspecting a function of the fabricated active matrix panel; and

mounting an organic light emitting diode on the active matrix panel after the inspection process, wherein the inspecting step further comprises the step of;

measuring variations in parasitic capacitance through a pixel electrode when a driving thin film transistor constituting the active matrix panel fabricated in the array process is turned on and off, and thereby to inspect any of open and short defects of the driving thin film transistor.

15. The manufacturing method for an active matrix organic light emitting diode panel according to claim 14, wherein the inspecting step further comprises the step of:

measuring the variation in parasitic capacitance of pixels constituting the active matrix panel and thereby to find the number of pixels having open and short defects in the driving thin film transistors thereof.

16. The manufacturing method for an active matrix organic light emitting diode panel according to claim 14, wherein the inspecting step further comprises the step of:

estimating unevenness caused upon formation of pixel circuits constituting the active matrix panel from unevenness of the variation in parasitic capacitance of pixels constituting the active matrix panel.

17. The manufacturing method for an active matrix organic light emitting diode panel according to claim 14, wherein the inspecting step further comprises the steps of:

estimating the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an on state; and

estimating the number of pixels having open defects in the driving thin film transistors thereof by use of a difference between a maximum value of the estimated parasitic capacitance and individual parasitic capacitance.

18. The manufacturing method for an active matrix organic light emitting diode panel according to claim 14, wherein the inspecting step further comprises the steps of:

estimating the parasitic capacitance on each line of inspection wiring constituting the active matrix panel while setting the driving thin film transistor of a pixel subjected to alternating-current coupling directly with a corresponding line of the inspection wiring to an off state; and

estimating the number of pixels having short defects in the driving thin film transistors thereof by use of a difference between a minimum value of the estimated parasitic capacitance and individual parasitic capacitance.

19. The manufacturing method for an active matrix organic light emitting diode panel according to claim 14, wherein the inspecting step further comprises the step of:

estimating the parasitic capacitance on each line of inspection wiring when the driving thin film transistors of pixels subjected to alternating-current coupling directly with the inspection wiring are turned on and off; and

estimating the number of open and short defects on each line of the inspection wiring by use of a difference among a minimum value and a maximum value of the estimated parasitic capacitance and the parasitic capacitance on each line of the inspection wiring.