PXI Express Controller Power Control State Machine

• US 20080120498A1
• Filed: 11/17/2006
• Published: 05/22/2008
• Est. Priority Date: 11/17/2006
• Status: Active Grant

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Kennedy, Jeffrey L., Peterson, Keith D.
• Granted Patent: US 8,312,298 B2
• Time in Patent Office: Days
• US Class Current: 713/2
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C

Abstract

A PXI Express controller may be configured to support at least three different conditions under which the controller may be turned on. If a chassis (e.g. a PXI Express chassis) interfacing with the controller has a power button, the first condition (which may be considered normal operation) may be met when the power button is being pressed at a time auxiliary power is present. When the chassis does not have a power button, the second condition may be met when the power is switched on at a time auxiliary power is present, and the third condition may be met when the power is switched on at a time auxiliary power is not present. A state-machine comprised in the PXI Express controller may be configured to interface with a chipset equally comprised in the PXI Express controller, to perform the control functions required to provide the support for the three different conditions.

Claims

1. A system comprising:

a functional block configured to perform one or more system functions; and

a controller block coupled to the functional block and operable to couple to a power supply that is operable to provide auxiliary power and main power to the system, wherein the controller block is operable to automatically assert a control signal to the functional block in response to the power supply being switched on and providing main power to the system;

wherein in response to the control signal being automatically asserted by the controller, the functional block is operable to instruct the system to turn on; and

wherein the controller is operable to prevent the system from turning on when auxiliary power is applied to the system at a time the system is turned off.

2. The system of claim 1, wherein the controller block is configured to receive a first feedback signal asserted by the power supply to indicate that the power supply is providing main power to the system, wherein the controller block is operable to assert the control signal in response to the first feedback signal being asserted by the power supply.

3. The system of claim 1, wherein the functional block is operable to provide a second feedback signal to the controller block, wherein the second feedback signal indicates to the controller:

that the functional block has instructed the system to turn on;

or

that the functional block has instructed the system to turn off.

4. The system of claim 3, wherein the functional block is operable to instruct the system to turn off in response to the first control signal being asserted at a time when the system is on;

wherein the controller block is operable to turn off the power supply in response to the second feedback signal indicating that the functional block has instructed the system to turn off.

5. The system of claim 1, wherein the functional block comprises a microprocessor coupled to a chipset and the controller block is a finite state machine.

6. The system of claim 1, wherein the system is a circuit board.

7. A system comprising:

a circuit board configured to insert into a chassis to couple the circuit board to the chassis, wherein the chassis comprises a power supply that is operable to provide main power to the system, wherein the circuit board comprises;

a chipset configured to at least partially implement functions performed by the system; and

control logic coupled to the chipset via a first signal line operable to carry a first signal;

wherein the control logic is operable to automatically assert the first signal in response to the power supply being switched on and providing main power to the system; and

wherein the chipset is operable to instruct the system to turn on in response to the first control signal being automatically asserted by the control logic.

8. The system of claim 7, wherein the control logic is further coupled to the chipset via a second signal line operable to carry a second signal, wherein the second signal indicates to the control logic:

that the chipset has instructed the system to turn on;

or

that the chipset has instructed the system to turn off.

9. The system of claim 7, wherein the chassis further comprises a power button configured to couple to the first signal line, wherein the power button, when pressed, is operable to assert the first signal;

wherein the power supply is operable to provide auxiliary power to the system;

wherein the chipset is operable to instruct the system to turn on in response to the power button being pressed at a time when;

auxiliary power is present in the system; and

the power supply is not providing main power to the system.

10. The system of claim 9, wherein the control logic is further coupled to the chipset via a second signal line operable to carry a second signal, wherein in instructing the system to turn on, the chipset is operable to assert the second signal;

wherein the control logic is operable to assert a third signal to the power supply to turn on the power supply, in response to the second signal being asserted.

11. The system of claim 10, wherein the control logic is operable to receive a fourth signal from the power supply, wherein the power supply is operable to assert the fourth signal to indicate that the power supply is switched on and is providing main power to the system.

12. A method for booting up (turning on) a system comprising a chassis with a power supply operable to provide main power and auxiliary power to the system, and a circuit board inserted into the chassis, the method comprising:

switching on the power supply to provide main power to the system;

the circuit board receiving from the power supply a feedback signal indicating that the power supply is providing main power to the system;

automatically asserting a control signal on the circuit board in response to said receiving the feedback signal indicating that the power supply is providing main power to the system, wherein said automatically asserting the control signal on the circuit board is performed regardless of the presence of auxiliary power in the system at the time said switching on the power supply is performed; and

the system booting up in response to said automatically asserting the control signal.

13. A method for booting up (turning on) and/or shutting off a system comprising control logic and system logic, the method comprising:

when the system is off, performing one of;

(a) switching on a power supply to provide main power to the system;

or

(b) pressing a power button to instruct the system logic to boot up the system;

in response to (b);

(c) asserting a power button signal to the system logic;

(d) the system logic instructing the system to boot up in response to (c);

(e) the control logic turning on the power supply in response to (d);

(f) the power supply indicating to the control logic that the power supply is on and providing main power to the system; and

(g) the system booting up in response to (f); and

in response to (a);

(h) performing (f);

(i) the control logic asserting the power button signal to the system logic in response to (h);

(j) the system logic instructing the system to boot up in response to (i); and

(k) the system booting up in response to (j).

14. The method of claim 13, further comprising:

(l) when the system is on, instructing the system logic to shut off the system;

(m) the system logic instructing the control logic that the system logic has been instructed to shut off the system;

(n) the control logic shutting off the power supply in response to (m); and

(o) the system shutting off in response to (l) and (n).

15. The method of claim 13, further comprising:

(p) enabling an instant off mode in the control logic;

(q) when the system is on, pressing the power button;

(r) the control logic shutting off the power supply in response to (q);

(s) performing (o).

16. A system comprising:

a chassis comprising a power supply operable to provide;

main power and auxiliary power to the system; and

a power supply status signal indicating whether the power supply is providing main power to the system; and

a circuit board operable to be inserted into the chassis, the circuit board comprising;

a chipset operable to control one or more system functions;

control logic configured to couple to the chipset and operable to receive the power supply status signal, wherein the control logic is operable to automatically assert a power button signal to the chipset in response to the power supply status signal indicating that the power supply is providing main power to the system when the system is off;

wherein the chipset is operable to instruct the system to turn on in response to the power button signal being asserted by the control logic.

17. The system of claim 16, wherein the chassis comprises a switch operable to switch on the power supply to provide main power to the system.

18. The system of claim 16, wherein the power supply is operable to provide auxiliary power to the system once the power supply is coupled to an external power source that provides power to the power supply.

19. The system of claim 18, wherein the control logic is configured to prevent the power supply from providing main power to the system when the system is off and:

the circuit board is inserted into the chassis at a time auxiliary power is present in the system; and

/or

auxiliary power is provided to the system after the circuit board has been inserted into the chassis.

20. The system of claim 16, wherein the chassis further comprises a power button operable to assert the power button signal to the chipset when the power button is pressed;

wherein the chipset is operable to instruct the system to turn on in response to the power button signal being asserted by the power button when the system is off, wherein the chipset is further operable to assert a power indicator signal to the control logic, wherein the asserted power indicator signal indicates to the control logic that the chipset has instructed the system to turn on;

wherein the control logic is operable to enable the power supply to provide main power to the system in response to the asserted power indicator signal; and

wherein the system is operable to boot up in response to the chipset having instructed the system to turn on and the power supply providing main power to the system.

21. A method for managing booting up (turning on) and shutting off a system, the method comprising:

entering a first state, wherein the first state indicates that auxiliary power is present in the system and the system is off;

transitioning from the first state to a second state if main power is present in the system and the system is on, wherein the second state indicates that the system is on;

transitioning from the first state to a third state if main power is present in the system and the system is off;

transitioning from the third state to the second state if the system is on;

transitioning from the second state to the first state if there is no main power present in the system;

transitioning from the second state to a fourth state if an instant off feature is enabled in the system and the system is instructed to shut off; and

transitioning from the fourth state to the first state if the system is off.

22. The method of claim 21, wherein said entering the first state is performed in response to one of:

providing auxiliary power to a chassis comprised in the system, wherein the system further comprises a circuit board plugged into the chassis;

or

plugging a circuit board comprised in the system into a chassis comprised in the system, wherein auxiliary power is present in the chassis at a time said plugging the circuit board into the chassis is performed.

23. The method of claim 22, wherein the chassis is a PXI Express chassis and the circuit board comprises a PXI Express Controller.