SIGNAL AMPLIFICATION DEVICE

• US 20080122539A1
• Filed: 09/07/2006
• Published: 05/29/2008
• Est. Priority Date: 05/16/2006
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Ide, Satoshi
• Granted Patent: US 7,382,166 B1
• Time in Patent Office: Days
• US Class Current: 330/254
• CPC Class Codes: H03F 1/34 Negative-feedback-circuit arrangements with or without positive feedback H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence ; for rejection of common mode signals H03F3/45479
• CPC Class Codes: H03F 2200/228 A measuring circuit being coupled to the input of an amplifier
• CPC Class Codes: H03F 2200/435 A peak detection being used in a signal measuring circuit in a controlling circuit of an amplifier
• CPC Class Codes: H03F 2203/45101 Control of the DC level being present
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45588 the IC comprising offset compensating means
• CPC Class Codes: H03F 3/087 with IC amplifier blocks H03F3/085 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

A signal amplification device which uses inexpensive standard CMOS and yet is capable of high-accuracy threshold setting. An offset voltage generator detects the direct-current level of an input signal, and generates a positive or negative offset voltage signal. A peak detector outputs, as a peak value, the positive offset voltage signal if the level thereof is higher than the maximum level of the input signal, or the maximum level of the input signal if the maximum level is higher than the positive offset voltage signal. A bottom detector outputs, as a bottom value, the negative offset voltage signal if the level thereof is lower than the minimum level of the input signal, or the minimum level of the input signal if the minimum level is lower than the negative offset voltage signal. A voltage divider subjects the peak and bottom values to voltage division, to generate a threshold level.

Claims

1. A signal amplification device for amplifying an input signal by automatically setting a threshold level, comprising:

an offset voltage generator for detecting a direct-current level of the input signal, and generating and outputting a positive offset voltage signal or a negative offset voltage signal;

a threshold controller including a peak detector for outputting the positive offset voltage signal as a peak value if a level of the positive offset voltage signal is higher than a maximum level of the input signal, and outputting the maximum level of the input signal as the peak value if the maximum level of the input signal is higher than the level of the positive offset voltage signal, a bottom detector for outputting the negative offset voltage signal as a bottom value if a level of the negative offset voltage signal is lower than a minimum level of the input signal, and outputting the minimum level of the input signal as the bottom value if the minimum level of the input signal is lower than the level of the negative offset voltage signal, and a voltage divider for subjecting the peak value output from the peak detector and the bottom value output from the bottom detector to voltage division, to generate the threshold level; and

an amplifier for amplifying a differential between the input signal and the threshold level output from the voltage divider.

2. The signal amplification device according to claim 1, wherein the peak detector includes a peak-side differential amplifier input with the positive offset voltage signal and the input signal, a peak-side diode for rectifying output of the peak-side differential amplifier, a peak-side capacitor for holding a peak voltage, and a peak-side buffer for buffering the peak value, and the bottom detector includes a bottom-side differential amplifier input with the negative offset voltage signal and the input signal, a bottom-side diode for rectifying output of the bottom-side differential amplifier, a bottom-side capacitor for holding a bottom voltage, and a bottom-side buffer for buffering the bottom value.

3. The signal amplification device according to claim 2, wherein the peak-side buffer is a P-channel source follower, and the peak-side diode is a P-channel Metal Oxide Semiconductor-Field Effect Transistor (MOS-FET).

4. The signal amplification device according to claim 2, wherein the bottom-side buffer is an N-channel source follower, and the bottom-side diode is an N-channel MOS-FET.

5. The signal amplification device according to claim 2, wherein the offset voltage generator detects the direct-current level of the input signal and adds a preset positive offset to the direct-current level to set the positive offset voltage signal.

6. The signal amplification device according to claim 2, wherein the offset voltage generator detects the direct-current level of the input signal and adds a preset negative offset to the direct-current level to set the negative offset voltage signal.

7. The signal amplification device according to claim 2, wherein the peak-side capacitor of the peak detector is grounded at one end, and the bottom-side capacitor of the bottom detector is supplied at one end with the output of the peak detector.

8. The signal amplification device according to claim 2, wherein the bottom-side capacitor of the bottom detector is grounded at one end, and the peak-side capacitor of the peak detector is supplied at one end with the output of the bottom detector.

9. The signal amplification device according to claim 1, wherein the amplifier is an automatic gain control amplifier, and

the signal amplification device further comprises a gain controller for controlling gain of the automatic gain control amplifier in accordance with a known relationship based on a differential between the peak value output from the peak detector and the bottom value output from the bottom detector.

20. The signal amplification device according to claims 1, wherein the amplifier is an automatic gain control amplifier, and

the signal amplification device further comprises a gain controller for controlling gain of the automatic gain control amplifier in accordance with a known relationship based on a differential between the peak value output from the peak detector and the bottom value output from the bottom detector.

21. A signal amplification device comprising:

a first signal amplifier constituted by the signal amplification device according to claim 1;

a second threshold controller including a second peak detector for detecting a peak value of an amplified signal amplified by the first signal amplifier, a second bottom detector for detecting a bottom value of the amplified signal, and a second voltage divider for subjecting the peak value output from the second peak detector and the bottom value output from the second bottom detector to voltage division, to generate a second threshold level; and

a second amplifier for amplifying a differential between the amplified signal and the second threshold level output from the second voltage divider.

10. A signal amplification device for amplifying an input signal by automatically setting a threshold level, comprising:

an offset voltage generator for detecting a direct-current level of the input signal that varies on a positive side, and generating and outputting a positive offset voltage signal;

a threshold controller including a peak detector for outputting the positive offset voltage signal as a peak value if a level of the positive offset voltage signal is higher than a maximum level of the input signal, and outputting the maximum level of the input signal as the peak value if the maximum level of the input signal is higher than the level of the positive offset voltage signal, a bottom detector for outputting a minimum level of the input signal as a bottom value, a negative offset voltage adder for adding a preset negative offset to the bottom value to generate a negative bottom shift value, and a voltage divider for subjecting the peak value output from the peak detector and the negative bottom shift value output from the negative offset voltage adder to voltage division, to generate the threshold level; and

an amplifier for amplifying a differential between the input signal and the threshold level output from the voltage divider.

12. The signal amplification device according to claim 10, wherein the peak detector includes a peak-side differential amplifier input with the positive offset voltage signal and the input signal, a peak-side diode for rectifying output of the peak-side differential amplifier, a peak-side capacitor for holding a peak voltage, and a peak-side buffer for buffering the peak value.

14. The signal amplification device according to claim 12, wherein the peak-side buffer is a P-channel source follower, and the peak-side diode is a P-channel MOS-FET.

16. The signal amplification device according to claim 12, wherein the offset voltage generator detects the direct-current level of the input signal and adds a preset positive offset to the direct-current level to set the positive offset voltage signal.

18. The signal amplification device according to claim 12, wherein the peak-side capacitor of the peak detector is grounded at one end, and the bottom-side capacitor of the bottom detector is supplied at one end with the output of the peak detector.

11. A signal amplification device for amplifying an input signal by automatically setting a threshold level, comprising:

an offset voltage generator for detecting a direct-current level of the input signal that varies on a negative side, and generating and outputting a negative offset voltage signal;

a threshold controller including a bottom detector for outputting the negative offset voltage signal as a bottom value if a level of the negative offset voltage signal is lower than a minimum level of the input signal, and outputting the minimum level of the input signal as the bottom value if the minimum level of the input signal is lower than the level of the negative offset voltage signal, a peak detector for outputting a maximum level of the input signal as a peak value, a positive offset voltage adder for adding a preset positive offset to the peak value to generate a positive peak shift value, and a voltage divider for subjecting the bottom value output from the bottom detector and the positive peak shift value output from the positive offset voltage adder to voltage division, to generate the threshold level; and

an amplifier for amplifying a differential between the input signal and the threshold level output from the voltage divider.

13. The signal amplification device according to claim 11, wherein the bottom detector includes a bottom-side differential amplifier input with the negative offset voltage signal and the input signal, a bottom-side diode for rectifying output of the bottom-side differential amplifier, a bottom-side capacitor for holding a bottom voltage, and a bottom-side buffer for buffering the bottom value.

15. The signal amplification device according to claim 13, wherein the bottom-side buffer is an N-channel source follower, and the bottom-side diode is an N-channel MOS-FET.

17. The signal amplification device according to claim 13, wherein the offset voltage generator detects the direct-current level of the input signal and adds a preset negative offset to the direct-current level to set the negative offset voltage signal.

19. The signal amplification device according to claim 13, wherein the bottom-side capacitor of the bottom detector is grounded at one end, and the peak-side capacitor of the peak detector is supplied at one end with the output of the bottom detector.