Increasing LCD aperture ratios

• US 20080123010A1
• Filed: 10/30/2007
• Published: 05/29/2008
• Est. Priority Date: 11/24/2006
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Tae-Hyeong, Park, Joon-Ha, Lee, So-Hyun
• Granted Patent: US 7,773,168 B2
• Time in Patent Office: Days
• US Class Current: 349/46
• CPC Class Codes: G02F 1/133707 Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/134345 Subdivided pixels, e.g. for grey scale or redundancy
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections

Abstract

A liquid crystal display includes an insulating substrate, a semiconductor, a gate insulating layer, a gate line, an interlayer insulating layer, a data line, a drain electrode, a passivation layer, and a pixel electrode. The semiconductor is formed on the insulating substrate and includes source, drain, and channel regions. The gate line is formed on the gate insulating layer over the semiconductor, and overlaps the channel region thereof. The data line is formed on the interlayer insulating layer and has a source electrode electrically connected to the source region and a drain electrode electrically connected to the drain region. The passivation layer is formed on the data line and drain electrode. The pixel electrode is formed on the passivation layer, and electrically connected to the drain electrode. The data line overlaps the drain region.

Claims

1. A liquid crystal display, comprising:

an insulating substrate;

a semiconductor formed on the insulating substrate, including a source region, a drain region, and a channel region;

a gate insulating layer formed on the semiconductor;

a gate line formed on the gate insulating layer and overlapping the channel region;

an interlayer insulating layer formed on the gate line;

a data line formed on the interlayer insulating layer and having a source electrode electrically connected to the source region;

a drain electrode electrically connected to the drain region;

a passivation layer formed on the data line and drain electrode; and

,

a pixel electrode formed on the passivation layer and electrically connected to the drain electrode, and

wherein the data line overlaps the drain region.

2. The liquid crystal display of claim 1, wherein the source electrode overlaps the source region.

3. The liquid crystal display of claim 1, wherein

the gate line includes a gate electrode protruding from the gate line, and

the channel region includes a first channel region overlapping the gate line and a second channel region overlapping the gate electrode.

4. The liquid crystal display of claim 3, wherein the semiconductor includes one or more bends.

5. The liquid crystal display of claim 1, wherein the semiconductor comprises polysilicon.

6. The liquid crystal display of claim 1, wherein the pixel electrode comprises a plurality of sub-electrodes, each having a quadrangular shape with rounded corners.

7. The liquid crystal display of claim 6, wherein:

a plurality of the pixel electrodes is formed on the substrate;

the pixel electrodes are aligned in a matrix;

each of the pixel electrodes is disposed between two pixel electrodes of an adjacent pixel row so that three adjacent pixel electrodes form a triple pixel region; and

,

the semiconductor extends through two adjacent triple pixel regions.

8. The liquid crystal display of claim 7, wherein:

the source electrode and the drain electrode are respectively connected to the source region and the drain region through first and second contact holes formed in the interlayer insulating layer, and

the first and second contact holes are disposed in an associated one of the triple pixel regions.

9. The liquid crystal display of claim 7, wherein each of the triple pixel regions is defined by corners of two laterally adjacent pixel electrodes and one edge of a vertically adjacent pixel electrode.

10. The liquid crystal display of claim 7, further comprising:

a second substrate disposed in facing opposition to the insulating substrate;

a light blocking member formed on the second substrate;

a color filter formed in a region defined by the light blocking member; and

,

a common electrode having a plurality of cutouts formed on the color filter.

11. The liquid crystal display of claim 10, wherein the light blocking member comprises portions respectively corresponding to each of the triple pixel regions.

12. The liquid crystal display of claim 10, wherein each cutout is disposed over the center of a corresponding one of the sub-electrodes.

13. The liquid crystal display of claim 10, wherein color filters corresponding to each of the three pixel electrodes of each triple pixel region displays a respective one of red, green, and blue colors.