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Nonvolatile Memory With Variable Read Threshold

  • US 20080123420A1
  • Filed: 11/03/2006
  • Published: 05/29/2008
  • Est. Priority Date: 11/03/2006
  • Status: Active Grant
First Claim
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1. A flash memory system comprising:

  • a flash memory array that includes a plurality of memory cells programmed to a plurality of programmed states;

    a reading circuit connected to the memory array, the reading circuit comparing a memory cell threshold voltage to a first plurality of predetermined voltages to distinguish the plurality of programmed states in a first mode and comparing the memory cell threshold voltage to a second plurality of predetermined voltages to distinguish the plurality of programmed states in a second mode, the highest one of the second plurality of predetermined voltages being higher than the highest one of the first plurality of predetermined voltages.

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