Switch protocol for network communications

• US 20080123642A1
• Filed: 10/05/2007
• Published: 05/29/2008
• Est. Priority Date: 10/05/2006
• Status: Active Grant

• Current Assignee: Waratek Limited (Waratek Holdings Ltd.)
• Original Assignee: John M. Holt
• Inventors: Holt, John M.
• Granted Patent: US 7,894,341 B2
• Time in Patent Office: Days
• US Class Current: 370/389
• CPC Class Codes: H04L 45/02 Topology update or discovery

Abstract

A switch protocol for network communications (particularly but not exclusively for multiple computer systems) is disclosed in which each switch (S1, S2, S3) maintains a list of addresses which can be reached via each port (A,B,C) of the switch. In addition, prior to delivering a message or packet to a port, the switch deletes any address in the message or packet which is unable to be reached via that port. The arrangement saves the repetitive sending of uni-cast messages and also saves broadcast messages being sent via the switches to computers which are not intended to receive the messages. Various networked topologies are also disclosed

Claims

1. A switch arrangement for communication of addressed data packets in a communications network including one or more switches each having a plurality of ports and a plurality of computers each of which is connected to at least one switch via at least one port, and each of which can send or receive said data packets, said switch arrangement comprising:

a memory in each said switch listing for each said port those ones of the plurality of computers able to be accessed via that port.

2. The arrangement as in claim 1, wherein each said switch never sends back to one of said computers a data packet originating with said one computer.

3. The arrangement as in claim 2, wherein each said switch sending one of said addressed data packets containing the addresses of a plurality of destination computers to a specific one of said ports deletes from said addresses any address which cannot be reached via said specific port.

4. A communications method in which data packets addressed to multiple destinations are transmitted via at least one multi-port switch from a source, the method comprising the steps of:

(i) providing the or each switch with a data processing capacity; and

(ii) having each said switch on receipt of one of said data packets delete those addresses of said multiple destinations which are inaccessible thereby.

5. The method as in claim 4, comprising the further steps of:

(iii) maintaining a list of the corresponding port for each said one of those destinations to which the switch is directly connected and the corresponding port(s) of that or those destination(s) to which the switch is not directly connected; and

(iii) having each said switch on receipt of one of said data packets addressed both to at least one destination to which the switch is directly connected and at least one destination to which said switch is indirectly connected, deliver said packet to the corresponding port of said directly connected destination(s) and delete the addresses of said directly connected destination(s) from said packet before delivering said one packet to the port(s) corresponding to that or those destination(s) to which said switch is not directly connected.

6. The method as in claim 4, wherein ports with a first plurality of addresses are prioritised over ports with either a single address or a second plurality of addresses, said second plurality being less than said first plurality.

7. A computer program stored in a computer readable media, the computer program including executable computer program instructions and adapted for execution by a processor or a CPU that is coupled with a memory to modify the operation of the processor and possibly devices or systems coupled with said processor;

the modification of operation including performing a communications method in which data packets addressed to multiple destinations are transmitted via at least one multi-port switch from a source, the method comprising the steps of;

(i) providing the or each switch with a data processing capacity;

(ii) having each said switch on receipt of one of said data packets delete those addresses of said multiple destinations which are inaccessible thereby.

8. The computer program as in claim 7, in which the method comprising the further steps of:

(iii) maintaining a list of the corresponding port for each said one of those destinations to which the switch is directly connected and the corresponding port(s) of that or those destination(s) to which the switch is not directly connected; and

(iv) having each said switch on receipt of one of said data packets addressed both to at least one destination to which the switch is directly connected and at least one destination to which said switch is indirectly connected, deliver said packet to the corresponding port of said directly connected destination(s) and delete the addresses of said directly connected destination(s) from said packet before delivering said one packet to the port(s) corresponding to that or those destination(s) to which said switch is not directly connected.

9. The computer program as in claim 8, wherein ports with a first plurality of addresses are prioritized over ports with either a single address or a second plurality of addresses, said second plurality being less than said first plurality.

10. A switch arrangement for transmission of addressed replica memory update packets in a multiple computer system having communications network including one or more switches each having a plurality of ports and a plurality of computers each of which is connected to at least one switch via at least one port and each of which can send or receive said data packets;

said computers of said multiple computer system each comprising an independent local memory and each operating a different portion of an application program written to operate on only a single computer, and where each said independent local memory comprises at least one application memory location replicated in all of said independent local memories and is updated to remain substantially similar; and

where said packets comprise an identifier and an updated value of a written-to replicated memory location, said switch arrangement comprising;

a memory in each said switch listing for each said port those ones of the plurality of computers able to be accessed via that port.