Electronics device, semiconductor device, and method for manufacturing the same

• US 20080124848A1
• Filed: 01/09/2008
• Published: 05/29/2008
• Est. Priority Date: 08/29/2003
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Nakamura, Osamu, Yamazaki, Shunpei, Nagai, Masaharu
• Granted Patent: US 7,465,593 B2
• Time in Patent Office: Days
• US Class Current: 438/155
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H10K 2102/3031 Two-side emission, e.g. transparent OLEDs [TOLED]
• CPC Class Codes: H10K 50/8426 Peripheral sealing arrangements, e.g. adhesives, sealants
• CPC Class Codes: H10K 50/87 Arrangements for heating or cooling
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/8722 Peripheral sealing arrangements, e.g. adhesives, sealants
• CPC Class Codes: H10K 59/8794 Arrangements for heating and cooling

Abstract

It is an object of the present invention to provide a high reliable EL display device and a manufacturing method thereof by shielding intruding moisture or oxygen which is a factor of deteriorating the property of an EL element without enlarging the EL display device.

In the invention, application is used as a method for forming a high thermostability planarizing film 16, typically, an interlayer insulating film (a film which serves as a base film of a light emitting element later) of a TFT in which a skeletal structure is configured by the combination of silicon (Si) and oxygen (O). After the formation, an edge portion or an opening portion is formed to have a tapered shape. Afterwards, distortion is given by adding an inert element with a comparatively large atomic radius to modify or highly densify a surface (including a side surface) for preventing the intrusion of moisture or oxygen.

Claims

1. A method for manufacturing a light emitting device, comprising the steps of:

forming a thin film transistor over a first substrate;

forming an interlayer insulating film over the thin film transistor;

selectively removing the interlayer insulating film to form an edge portion having a tapered shape;

adding an inert element to the interlayer insulating film;

forming a light emitting element over the interlayer insulating film; and

sealing the light emitting element by attaching a second substrate to the first substrate with a sealant surrounding a circumference of the light emitting element,

wherein the edge portion of the interlayer insulating film includes the inert element, and

wherein the light emitting element is electrically connected to the thin film transistor.

2. The method for manufacturing a light emitting device according to claim 1,

wherein the interlayer insulating film is a high thermostability planarizing film.

3. The method for manufacturing a light emitting device according to claim 1,

wherein the interlayer insulating film is formed by spin coat method.

4. The method for manufacturing a light emitting device according to claim 1,

wherein the inert element contains one selected from the group consisting of He, Ne, Ar, Kr and Xe.

5. The method for manufacturing a light emitting device according to claim 1,

wherein a taper angle of the edge portion of the interlayer insulating film is more than 30°

and less than 75°

.

6. A method for manufacturing a light emitting device, comprising the steps of:

forming a thin film transistor over a first substrate;

forming an interlayer insulating film over the thin film transistor;

selectively removing the interlayer insulating film to form an edge portion having a tapered shape;

adding an inert element to the interlayer insulating film;

forming a light emitting element over the interlayer insulating film; and

sealing the light emitting element by attaching a second substrate to the first substrate with a sealant surrounding a circumference of the light emitting element,

wherein the edge portion of the interlayer insulating film includes the inert element,

wherein the light emitting element is electrically connected to the thin film transistor, and

wherein the sealant is formed on the edge portion of the interlayer insulating film.

7. The method for manufacturing a light emitting device according to claim 6,

wherein the interlayer insulating film is a high thermostability planarizing film.

8. The method for manufacturing a light emitting device according to claim 6,

wherein the interlayer insulating film is formed by spin coat method.

9. The method for manufacturing a light emitting device according to claim 6,

wherein the inert element contains one selected from the group consisting of He, Ne, Ar, Kr and Xe.

10. The method for manufacturing a light emitting device according to claim 6,

wherein a taper angle of the edge portion of the interlayer insulating film is more than 30°

and less than 75°

.

11. A method for manufacturing a light emitting device, comprising the steps of:

forming a thin film transistor over a first substrate;

forming an interlayer insulating film over the thin film transistor;

selectively removing the interlayer insulating film to form an edge portion having a tapered shape;

adding an inert element to the interlayer insulating film;

forming a metal layer over the edge portion of the interlayer insulating film;

forming a light emitting element over the interlayer insulating film; and

sealing the light emitting element by attaching a second substrate to the first substrate with a sealant surrounding a circumference of the light emitting element,

wherein the edge portion of the interlayer insulating film includes the inert element,

wherein the light emitting element is electrically connected to the thin film transistor, and

wherein the sealant is formed on the metal layer.

12. The method for manufacturing a light emitting device according to claim 11,

wherein the interlayer insulating film is a high thermostability planarizing film.

13. The method for manufacturing a light emitting device according to claim 11,

wherein the interlayer insulating film is formed by spin coat method.

14. The method for manufacturing a light emitting device according to claim 11,

wherein the inert element contains one selected from the group consisting of He, Ne, Ar, Kr and Xe.

15. The method for manufacturing a light emitting device according to claim 11,

wherein a taper angle of the edge portion of the interlayer insulating film is more than 30°

and less than 75°

.

16. A method for manufacturing a light emitting device, comprising the steps of:

forming a thin film transistor over a first substrate, the thin film transistor comprises a semiconductor layer having a source region, a drain region and a channel forming region therebetween, a gate insulating film and a gate electrode;

forming an interlayer insulating film over the thin film transistor;

selectively removing the interlayer insulating film to form an edge portion having a tapered shape;

adding an inert element to the interlayer insulating film;

forming a metal layer on the edge portion of the interlayer insulating film, and a source electrode and a drain electrode on the interlayer insulating film;

forming a light emitting element over the interlayer insulating film; and

sealing the light emitting element by attaching a second substrate to the first substrate with a sealant surrounding a circumference of the light emitting element,

wherein the edge portion of the interlayer insulating film includes the inert element,

wherein the source electrode is electrically connected to the source region and the drain electrode is electrically connected to the drain region,

wherein the light emitting element is electrically connected to the source electrode or the drain electrode, and

wherein the sealant is formed on the metal layer.

17. The method for manufacturing a light emitting device according to claim 16,

wherein the interlayer insulating film is a high thermostability planarizing film.

18. The method for manufacturing a light emitting device according to claim 16,

wherein the interlayer insulating film is formed by spin coat method.

19. The method for manufacturing a light emitting device according to claim 16,

wherein the inert element contains one selected from the group consisting of He, Ne, Ar, Kr and Xe.

20. The method for manufacturing a light emitting device according to claim 16,

wherein a taper angle of the edge portion of the interlayer insulating film is more than 30°

and less than 75°

.