System and method of reducing interferences in wireless communication networks

• US 20080125160A1
• Filed: 11/27/2006
• Published: 05/29/2008
• Est. Priority Date: 11/27/2006
• Status: Active Grant

• Current Assignee: Guangdong OPPO Mobile Telecommunications Corporation Limited
• Original Assignee: Intel Corporation
• Inventors: Zhu, Jing
• Granted Patent: US 7,684,758 B2
• Time in Patent Office: Days
• US Class Current: 455/522
• CPC Class Codes: H04W 52/20 using error rate
• CPC Class Codes: H04W 52/243 taking into account interferences

Abstract

A system and method of reducing interference in a wireless communication network is disclosed. The method comprises adapting a transmission power of a signal of a wireless communication device when a clear channel assessment threshold equals a predetermined limit and a packet error rate exceeds a predetermined packet error rate threshold. In particular, the method includes increasing the transmission power of the signal when the clear channel assessment threshold equals a lower limit and the packet error rate exceeds an upper packet error rate threshold and decreasing the transmission power of the signal when the clear channel assessment threshold equals an upper limit and the packet error rate falls below a lower packet error rate threshold.

Claims

1. A method comprising:

reducing interference in a wireless communication network by adapting a transmission power of a signal of a wireless communication device when a clear channel assessment threshold equals a predetermined limit and a packet error rate exceeds a predetermined packet error rate threshold.

2. The method of claim 1, further comprising:

increasing the transmission power of the signal when the clear channel assessment threshold equals a lower limit and the packet error rate exceeds an upper packet error rate threshold.

3. The method of claim 1, further comprising:

decreasing the transmission power of the signal when the clear channel assessment threshold equals an upper limit and the packet error rate falls below a lower packet error rate threshold.

4. The method of claim 1, further comprising:

maintaining the transmission power of the signal when the clear channel assessment threshold is between a lower limit and an upper limit for the clear channel assessment threshold.

5. The method of claim 1, further comprising decreasing the clear channel assessment threshold when the packet error rate is greater than an upper packet error rate threshold and the clear channel assessment threshold is greater than a lower limit for the clear channel assessment threshold.

6. The method of claim 1, further comprising increasing the clear channel assessment threshold when the packet error rate is less than a lower packet error rate threshold and the clear channel assessment threshold is less than an upper limit for the clear channel assessment threshold.

7. The method of claim 1, further comprising using the predetermined packet error rate threshold as the packet error rate threshold for adaptation of the clear channel assessment threshold and for adaptation of the transmission power of the signal.

8. The method of claim 1, further comprising measuring a first packet error rate for a first type of interference and measuring a second packet error rate for a second type of interference.

9. The method of claim 1, further comprising using a first predetermined packet error rate threshold for adapting the clear channel assessment threshold and a second predetermined packet error rate threshold for adapting the transmission power of the signal.

10. A system comprising:

computer readable program code components configured to cause reducing interference in a wireless communication network by adapting a transmission power of a signal of a wireless communication device when a clear channel assessment threshold equals a predetermined limit and a packet error rate exceeds a predetermined packet error rate threshold.

11. The system of claim 10, further comprising computer readable program code components configured to cause increasing the transmission power of the signal when the clear channel assessment threshold equals a lower limit and the packet error rate exceeds an upper packet error rate threshold.

12. The system of claim 10, further comprising computer readable program code components configured to cause decreasing the transmission power of the signal when the clear channel assessment threshold equals an upper limit and the packet error rate falls below a lower packet error rate threshold.

13. The system of claim 10, further comprising computer readable program code components configured to cause maintaining the transmission power of the signal when the clear channel assessment threshold is between a lower limit and an upper limit for the clear channel assessment threshold.

14. The system of claim 10, further comprising computer readable program code components configured to cause decreasing the clear channel assessment threshold when the packet error rate is greater than the upper packet error rate threshold and the clear channel assessment threshold is greater than the lower limit for the clear channel assessment threshold.

15. The system of claim 10, further comprising computer readable program code components configured to cause increasing the clear channel assessment threshold when the packet error rate is less than a lower packet error rate threshold and the clear channel assessment threshold is less than an upper limit for the clear channel assessment threshold.

16. The system of claim 10, further comprising computer readable program code components configured to cause measuring a first packet error rate for a first type of interference and measuring a second packet error rate for a second type of interference.

17. A processor to reduce interference in a wireless communication network by adapting a transmission power of a signal of a wireless communication device when a clear channel assessment threshold equals a predetermined limit and a packet error rate exceeds a predetermined packet error rate threshold.

18. The processor of claim 17, to increase the transmission power of the signal when the clear channel assessment threshold equals a lower limit and the packet error rate exceeds an upper packet error rate threshold.

19. The processor of claim 17, to decrease the transmission power of the signal when the clear channel assessment threshold equals an upper limit and the packet error rate falls below a lower packet error rate threshold.