Embedded system and communication method thereof
First Claim
1. An embedded system, comprising:
- an embedded processor A;
a processor or equipment B; and
a FPGA/CPLD module;
wherein a synchronous serial port of the embedded processor A is connected with the FPGA/CPLD module;
in which a transmission clock and transmission frame synchronization signal are taken as output, while a receiving clock and receiving frame synchronization signal are taken as input; and
the communication interface of the processor or equipment B is connected with the FPGA/CPLD module.
2 Assignments
0 Petitions
Accused Products
Abstract
A system comprises an embedded processor A, a processor or equipment B and a FPGA/CPLD module, wherein a synchronous serial port of the embedded processor A is connected with the FPGA/CPLD module; in which a transmission clock and transmission frame synchronization signal are taken as output, while a receiving clock and receiving frame synchronization signal are taken as input; and a communication interface of the processor or equipment B is connected with the FPGA/CPLD module. This system ensures that the data transmitting party always take initiatives during communications with processor of equipment B. Via the FPGA/CPLD module, the system may interface with other systems through different communication protocols, such that the system need not modify its solutions to adapt to different protocols, but only upgrades the logic of the FPGA/CPLD to adapt to the new interfaces. As such, a high-speed, reliable and flexible communication mechanism is established.
-
Citations
14 Claims
-
1. An embedded system, comprising:
-
an embedded processor A; a processor or equipment B; and a FPGA/CPLD module; wherein a synchronous serial port of the embedded processor A is connected with the FPGA/CPLD module;
in which a transmission clock and transmission frame synchronization signal are taken as output, while a receiving clock and receiving frame synchronization signal are taken as input; and
the communication interface of the processor or equipment B is connected with the FPGA/CPLD module. - View Dependent Claims (2, 3)
-
-
4. A communication method for an embedded system, comprising data transmitting from a processor A to a processor or equipment B, which transmitting particularly comprises the following steps:
-
the processor A transmits data to a FPGA/CPLD module according to a communication protocol A′
thereof;the FPGA/CPLD module performs format conversion on the data from the processor A according to a communication protocol B′
of the processor or equipment B; andthe FPGA/CPLD module then forwards the converted data to the processor or equipment B. - View Dependent Claims (5, 6, 7, 8, 9, 10)
-
-
11. A communication method for an embedded system, comprising data transmitting from a processor A to a processor or equipment B, which transmitting particularly comprises the following steps:
-
a FPGA/CPLD module receives data transmitted from the processor A upon recognition that a frame synchronization signal is transmitted from the processor A; and the FPGA/CPLD module identifies a data packet according to a protocol A′
agreed upon with the processor A, and forwards the data to the processor or equipment B according to a protocol B′
agreed upon with the processor or equipment B. - View Dependent Claims (12, 13, 14)
-
Specification