Contention detection and resolution

• US 20080126721A1
• Filed: 10/05/2007
• Published: 05/29/2008
• Est. Priority Date: 10/05/2006
• Status: Active Grant

• Current Assignee: Waratek Limited (Waratek Holdings Ltd.)
• Original Assignee: John M. Holt
• Inventors: Holt, John M.
• Granted Patent: US 7,949,837 B2
• Time in Patent Office: Days
• US Class Current: 711/159
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the same by updating all computers with every change made to addressed memory locations. Contention can arise when the same memory location is substantially simultaneously updated by two or more machines because of transmission delays and latency of the communications network interconnecting all the computers. In particular a method of detecting and resolving contention is disclosed which utilizes a count value indicative of the number of the sequence of occasions on which each memory location has been updated. Contention is indicated if the currently stored count value and the incoming updating count value are the same. The contention can be resolved by providing a further rule. One such further rule is that in the presence of contention the updating message from the higher numbered computer is to be accepted and the updating message from the lower numbered computer is to be rejected. Other further rules are also disclosed.

Claims

1. A method of resolving contention in addressed memory updating in which a memory location having a specific location identifier can be updated substantially simultaneously from a plurality of sources, said method comprising the steps of:

(i) utilizing an updating format for the signal or packet carrying out the updating, said format comprising the specific identifier of the memory location to be updated, the content with which said memory location is to be updated, and a resident updating count of the updating source, said count comprising a number indicative of the position of the updating message in the sequence of occasions on which the updating source has been updated inclusive of the current updating;

(ii) storing for each receiving memory location the updating count of the previously received updating;

(iii) comparing the updating count presently resident at the receiving memory location with the updating count of any currently received updating signal or packet, and

(iv) if the currently received updating count is greater than the presently resident updating count, not actioning the incoming signal or packet;

or

(v) if the currently received updating count is less than the currently resident updating count, actioning the incoming signal or packet;

or

(vi), if the currently received updating count is equal to the presently resident updating count, instituting a contention resolution.

2. The method as defined in claim 1, in which actioning the incoming signal or packet includes the steps of:

replacing the content of the specific memory location with the content of the incoming signal or packet, and replacing the presently resident updating count with the updating count of the incoming signal or packet.

3. The method as defined in claim 1 or 2, wherein said instituted contention resolution procedure is substantially independent of time.

4. The method as defined in claim 3, wherein said contention resolution procedure comprises the steps of:

(vii) determining the identity of each updating source, said updating sources being assigned a hierarchical order; and

(viii) accepting the updating signal or packet from the source with the higher ranking in said hierarchical order.

5. The method as defined in claim 3, wherein said contention resolution procedure comprises the steps of:

(ix) determining the identity of each updating source, said updating sources being assigned a hierarchical order; and

(x) accepting the updating signal or packet from the source with the lower ranking in said hierarchical order.

6. The method as defined in claim 3, wherein in said contention resolution procedure comprises the steps of:

(xi) allocating a substantially random number to each updating source; and

(xii) accepting the updating signal or packet from the source with the higher random number.

7. The method as defined in claim 3, wherein in said contention resolution procedure comprises the steps of:

(xiii) allocating a substantially random number to each updating source; and

(xiv) accepting the updating signal or packet from the source with the lower random number.

8. A system for detecting contention in addressed memory updating, said system comprising:

at least one memory location having a specific location identifier;

a plurality of sources each of which can update said memory location(s) and each of which utilizes an updating format for the signal or packet carrying out the updating, said format comprising the specific identifier of the memory location to be updated, the content with which said memory location is to be updated, and a resident updating count of the updating source, said count comprising a number indicative of the position of the updating message in the sequence of occasions on which the updating source has been updated inclusive of the current updating;

a storage means associated with each said memory location and in which the updating count of the previously received updating is stored;

comparison means to compare the previously stored updating count with the updating count of any currently received updating signal or packet;

contention indicating means connected with said comparison means and operable to indicate

a contention situation if the compared updating counts are the same,

to not act upon the currently received updating signal or packet if said comparison indicates that the currently received updating count is greater than the presently resident updating count, or

to act upon the currently received updating signal or packet if said comparison indicates that the currently received updating count is less than the presently resident updating count, and

contention resolution means connected with said contention indicating means to institute a contention resolution procedure.

9. The system as defined in claim 8, wherein said contention indicating means includes an overwrite means which acts upon the currently received updating signal or packet to replace the content of the specific memory location with the content of the incoming signal or packet, and replaces the presently resident updating count with the updating count of the incoming signal or packet.

10. The system as defined in claim 8 or 9, wherein the operation of said contention resolution means is substantially independent of time.

11. The system as defined in any one of claims 8-10, wherein said contention resolution means includes a comparator means, each said updating source is assigned an indicative number, the indicative numbers of the last updating source and the currently updating, but contention indicated, source are compared by said comparator means, and the currently received updating signal or packet is acted upon only if the comparison is positive.

12. The system as defined in any one of claims 8-10, wherein said contention resolution means includes a comparator means, each said updating source is assigned an indicative number, the indicative numbers of the last updating source and the currently updating, but contention indicated, source are compared by said comparator means, and the currently received updating signal or packet is acted upon only if the comparison is negative.

13. The system as defined in claim 11 or 12, wherein said indicative number represents the number of a computer in a hierarchy of computers.

14. The system as defined in claim 11 or 12 wherein said indicative number is a substantially random number.

15. The system as defined in any one of claims 8-14, wherein said memory location is one of a plurality of memory locations resident in one of a plurality of computers and each of said plurality of computers has substantially the same structure of memory locations.

16. The system as defined in claim 15, wherein each said updatable memory location in one of said computers has a corresponding memory location in each of the others of said computers.

17. The system as defined in claim 16, wherein each said updatable memory location has a local memory address which is different from said location identifier.