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CLOSED-LOOP DESIGN FOR MANUFACTURABILITY PROCESS

  • US 20080127029A1
  • Filed: 10/31/2006
  • Published: 05/29/2008
  • Est. Priority Date: 10/31/2006
  • Status: Active Grant
First Claim
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1. A method for designing an integrated circuit, the method comprising the steps of:

  • providing one or more design tolerances;

    providing a layout;

    providing a first process model;

    modifying said layout to form a first modified layout so that first image contours satisfy said one or more design tolerances, wherein said first image contours correspond to said first modified layout as determined using said first process model;

    providing a second process model; and

    modifying said first modified layout to form a second modified layout so that second image contours substantially match said first image contours, wherein said second image contours correspond to said second modified layout as determined by said second process model.

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