ELECTRONIC DEVICE WITH CONNECTING STRUCTURE

• US 20080128803A1
• Filed: 11/29/2007
• Published: 06/05/2008
• Est. Priority Date: 12/01/2006
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Hirler, Franz, Zundel, Markus
• Granted Patent: US 8,044,460 B2
• Time in Patent Office: Days
• US Class Current: 257/331
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/945 Trench capacitors

Abstract

A connecting structure for an electronic device includes an edge region of the device, a first trench and a second trench running toward the edge region, a first electrode within the first trench, and a second electrode within the second trench, the first and second electrodes being arranged in a same electrode plane with regard to a main surface of a substrate of the electronic device within the trenches, and the first electrode extending, at an edge region side end of the first trench, farther toward the edge region than the second electrode extends, at an edge region side end of the second trench, toward the edge region.

Claims

1. A semiconductor device including a connecting structure comprising:

an edge region;

a first trench and a second trench running toward the edge region;

a first electrode within the first trench; and

a second electrode within the second trench;

wherein the first and second electrodes are arranged in a same electrode plane with regard to a main surface of a substrate of the electronic device within the trenches;

wherein the first electrode extends, at an edge region side end of the first trench, farther toward the edge region than the second electrode extends, at an edge region side end of the second trench, toward the edge region; and

wherein the first electrode is connected to a connection structure for a first potential, and the second electrode is connected to a connection structure for a second potential.

2. The semiconductor device of claim 1, wherein the connection structure for the first potential contacts the first electrode in a region which extends further to the edge region.

3. The semiconductor device of claim 1, wherein the first trench extends farther toward the edge region than do/does the second electrode and/or the second trench.

4. The semiconductor device of claim 1, further comprising a further edge region which is essentially opposite the edge region, and wherein the second electrode, at an end of the second trench which is facing the further edge region, extends farther toward the further edge region than the first electrode extends, at an end of the first trench which is facing the further edge region, toward the further edge region.

5. The semiconductor device of claim 4, wherein the connection structure for the second potential contacts the second electrode within a region which extends farther toward the further edge region.

6. The semiconductor device of claim 4, wherein the second trench extends farther toward the further edge region than do/does the first electrode and/or the first trench.

7. The semiconductor device of claim 1, wherein the first electrode and/or the second electrode extend(s) beyond the region of the first trench and of the second trench, respectively.

8. The semiconductor device of claim 1, wherein the connection structure for the first potential and/or the connection structure for the second potential comprise(s) an electrically conductive contact structure extending vertically to the main surface of the substrate.

9. The semiconductor device of claim 1, wherein the first trench further comprises a first lower electrode arranged below the first electrode in relation to the main surface of the substrate, the first electrode and the first lower electrode being arranged on two electrode planes within the first trench, and wherein the connection structure for the first potential and/or the connection structure for the second potential comprise(s) a contact structure for contacting the first lower electrode.

10. The semiconductor device of claim 1, wherein the second trench further comprises a second lower electrode arranged below the second electrode in relation to the main surface of the substrate, the second electrode and the second lower electrode being arranged on two electrode planes within the second trench and wherein the connection structure for the first potential and/or the connection structure for the second potential comprise(s) a contact structure for contacting the second lower electrode.

11. The semiconductor device of claim 1, further comprising:

a further edge region of the electronic device, which is essentially opposite the edge region;

a third trench running toward the edge region and the further edge region;

a third electrode within the third trench, which extends farther toward the further edge region than do the first electrode and the second electrode; and

a central region of the electronic device, into which the first and third electrodes do not extend;

the first, the second, and the third electrodes being arranged in the same electrode plane with regard to the main surface of the substrate of the electric device within the trenches; and

the third electrode being connected to a further connection structure for an electrical potential.

12. The semiconductor device of claim 11, wherein the first electrode and the third electrode run on an essentially straight connecting line.

13. The semiconductor device of claim 11, wherein the further connection structure is electrically conductively connected to the connection structure for the first potential.

14. The semiconductor device of claim 11, wherein the third trench further comprises a third lower electrode arranged below the third electrode in relation to the main surface of the substrate, the third electrode and the third lower electrode being arranged on two electrode planes within the third trench, and wherein at least one connection structure of the connection structure for the first potential, of the connection structure for the second potential, or the further connection structure comprises a contact structure for contacting the third lower electrode.

15. The semiconductor device of claim 1 further comprising a plurality of first trenches having first electrodes associated respectively, and/or a plurality of second trenches having second electrodes associated respectively, and wherein a first trench is arranged between two second trenches, and/or a second trench is arranged between two first trenches.

16. The semiconductor device of claim 1, wherein the electronic device is a vertical transistor, the first electrode being a gate electrode, and the second electrode being a source electrode, and wherein the external structure of the electronic device is a terminal for the gate electrode.

17. A semiconductor device including a connecting structure comprising:

a first edge region;

a second edge region opposite the first edge region;

a central region arranged between the first edge region and the second edge region;

first, second, and third trenches running toward the first edge region and the second edge region;

a first electrode within the first trench, a second electrode within the second trench, and a third electrode within the third trench,

the first, second, and third electrodes being arranged in an electrode plane arranged with regard to a main surface of a substrate of the electronic device;

the first electrode extending farther into the first edge region than the second electrode and the third electrode;

the third electrode extending farther into the second edge region than the first electrode and the second electrode;

the first and third electrodes not extending into the central region;

the first electrode and the third electrode being arranged on a straight connecting line;

the second electrode being arranged offset to the connecting line; and

the first electrode and the third electrode being contacted with a connection structure for a first potential, and the second electrode being connected with a connection structure for a second potential.

18. The semiconductor device of claim 17, wherein the connection structure for the first potential contacts the first electrode within the first edge region and the third electrode within the second edge region.

19. The semiconductor device of claim 17, wherein the connection structure for the first potential and/or the connection structure for the second potential comprise(s) a contacting area.

20. The semiconductor device of claim 17, wherein the first trench further comprises a first lower electrode arranged below the first electrode in relation to the main surface of the substrate, and wherein the third trench further comprises a third lower electrode arranged below the third electrode in relation to the main surface of the substrate, the first lower electrode and the third lower electrode being arranged on a second electrode plane within the first trench and the third trench, respectively.

21. The semiconductor device of claim 20, wherein the first lower electrode and the third lower electrode are connected to the connection structure for the second potential.

22. The semiconductor device of claim 17, wherein the second trench further comprises a second lower electrode arranged below the second electrode in relation to the main surface of the substrate, the second electrode and the second lower electrode being arranged on two electrode planes within the second trench.

23. The semiconductor device of claim 17 further comprising a plurality of first trenches having first electrodes associated respectively, and a plurality of third trenches having third electrodes associated respectively, and/or a plurality of second trenches having second electrodes associated respectively.

24. The semiconductor device of claim 23, wherein a second trench is arranged adjacent to both sides of first and third trenches, and/or first and third trenches, respectively, are arranged adjacent to both sides of a second trench.

25. A connecting structure for an electronic device, comprising:

an edge region;

a first trench and a second trench running toward the edge region;

a first electrode within the first trench, no further electrode being arranged, to the side of the first electrode, within the first trench; and

a second electrode within the second trench, no further electrode being arranged, to the side of the second electrode, within the second trench,

wherein the first electrode, at an edge region side end of the first trench, extends farther toward the edge region than the second electrode at an edge region side end of the second trench extends towards the edge region; and

wherein the first electrode is connected to a connection structure for a first potential, and the second electrode is connected to a connection structure for a second potential.