Configurable IC with interconnect circuits that have select lines driven by user signals

• US 20080129335A1
• Filed: 11/19/2007
• Published: 06/05/2008
• Est. Priority Date: 03/15/2005
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Brad Hutchings, Herman Schmit, Steve Teig
• Inventors: Hutchings, Brad, Teig, Steven, Schmit, Herman
• Granted Patent: US 7,932,742 B2
• Time in Patent Office: Days
• US Class Current: 326/41
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H03K 19/17736 Structural details of routing resources

Abstract

Some embodiments of the invention provide a configurable integrated circuit (“IC”). The IC includes a first set of circuits and a second set of circuits interspersed among the first set of circuits. Each set of circuits includes at least ten volatile configurable circuits. Several circuits in at least one of the sets are user multiplexers. Each particular user multiplexer has input and output terminals and has a set of select terminals for receiving a set of user-design signals that directs the particular multiplexer to connect a set of the input terminals to a set of the output terminals. The user-design signals are signals generated internally by the IC.

Claims

1-49. -49. (canceled)

50. An integrated circuit (IC) comprising:

a particular arrangement of configurable logic circuits for configurably performing a set of logic functions, the particular arrangement comprising;

(i) a set of configurable logic circuits for performing a set of functions as determined by configuration data; and

(ii) a set of user interconnect circuits for performing a function based on user signals, wherein each user interconnect circuit comprises an input terminal set for receiving a set of input data, a select terminal set for receiving a set of user signals, and an output terminal set for outputting a subset of the set of input data, said outputting based on the received set of user signals.

51. The IC of claim 50, wherein a particular configurable logic circuit is a lookup table (LUT).

52. The IC of claim 50, wherein the set of user interconnect circuits is for performing a logic function.

53. The IC of claim 52, wherein the set of user interconnect circuits is for performing a Boolean operation.

54. The IC of claim 50, wherein a particular user signal is internally generated by circuits of the IC during runtime of the IC.

55. The IC of claim 50, wherein the user interconnect circuits are in a particular repeated pattern within circuits of the IC.

56. The IC of claim 50, wherein the particular arrangement comprises an interspersing of the user interconnect circuits amongst repeated patterns of circuits throughout the IC.

57. The IC of claim 56, wherein the particular arrangement comprises at least fifty user interconnect circuits.

58. The IC of claim 50 further comprising a second set of non-configurable logic circuits for performing a static set of logic functions.

59. The IC of claim 50 further comprising a configurable interconnect circuit for configurably supplying user signals produced by a particular set of configurable logic circuits to a particular user interconnect circuit, said supplying based on configuration data.

60. A configurable integrated circuit (IC) comprising:

a plurality of configurable logic circuits, each configurable logic circuit comprising;

a plurality of user interconnect circuits, each user interconnect circuit comprising a set of input terminals, a set of output terminals, and a set of select terminals for receiving a set of user-design signals that directs the user interconnect circuit to connect a subset of the input terminals to the set of output terminals; and

a configurable interconnect circuit for configurably outputting an output of at least one user interconnect circuit of the plurality of user interconnect circuits as determined by stored configuration data, wherein an output of a particular user interconnect circuit and the configurable interconnect circuit is an output for a particular logic function from the set of logic functions.

61. The configurable IC of claim 60, wherein the user-design signals determine a logic function from the set of logic functions for each user interconnect circuit to perform.

62. The configurable IC of claim 60, wherein the plurality of circuits is distributed within an array of circuits of the IC and said logic circuit is within the array.

63. The configurable IC of claim 60, wherein the plurality of circuits is distributed within a particular repeated pattern and said logic circuit is interspersed within the plurality of circuits.

64. The configurable IC of claim 60, wherein a particular user-design signal comprises signals generated by circuits of the IC during runtime of the IC.

65. A method for performing logic functions in an integrated circuit (IC), the method comprising:

performing a first plurality of logic functions by using a plurality of configurable logic circuits that are configured by configuration data; and

performing a second plurality of logic functions by using a plurality of user interconnect circuits, wherein a particular user interconnect circuit receives a set of input and outputs a subset of the received input based on a set of user signals.