Voltage Controlled Oscillator

• US 20080129393A1
• Filed: 11/29/2007
• Published: 06/05/2008
• Est. Priority Date: 11/30/2006
• Status: Active Grant

• Current Assignee: Intellectual Ventures Holding 40 LLC (Intellectual Ventures LLC)
• Original Assignee: Intellectual Ventures Holding 40 LLC (Intellectual Ventures LLC)
• Inventors: Swartzlander, Earl E., Rangan, Giri N.K.
• Granted Patent: US 7,737,795 B2
• Time in Patent Office: Days
• US Class Current: 331/57
• CPC Class Codes: H03K 2005/00026 controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
• CPC Class Codes: H03K 2005/00208 using differential stages
• CPC Class Codes: H03K 2005/00234 using circuits having two logic levels
• CPC Class Codes: H03K 3/0322 with differential cells

Abstract

A ring oscillator based voltage controlled oscillator (VCO) is disclosed. The VCO includes a set of delay cells connected to each other in a ring configuration. Each of the delay cells includes a source-coupled input transistor pair, a current-steering transistor pair and a pair of load resistors. The source-coupled input transistor pair receives a pair of differential voltage inputs. The load resistors, which are connected to the source-coupled input transistor pair, provide a pair of differential voltage outputs. The current-steering transistor pair, which is connected to the source-coupled input transistor pair, receives a pair of differential bias voltage inputs. The output frequency of the VCO is directly proportional to the differential bias voltages at the pair of differential bias voltage inputs.

Claims

1. A voltage controlled oscillator (VCO) comprising:

a plurality of delay cells connected to each other in a ring configuration, wherein each of said plurality of delay cells includes

a source-coupled input transistor pair for receiving a pair of differential voltage inputs;

a pair of load resistors connected to said source-coupled input transistor pair for providing a pair of differential voltage outputs; and

a current-steering transistor pair connected to said source-coupled input transistor pair for receiving a pair of differential bias voltage inputs, wherein an output frequency of said VCO is directly proportional to differential bias voltages at said pair of differential bias voltage inputs.

2. The VCO of claim 1, wherein said VCO includes an even number of said delay cells.

3. The VCO of claim 1, wherein one of said delay cells has its positive output connected to a negative input of another one of said delay cells, and its negative output connected to a positive input of said another one delay cell.

4. The VCO of claim 3, wherein the remaining of said delay cells have their respective positive/negative outputs connected to positive/negative inputs of their adjacent delay cell accordingly.

5. The VCO of claim 1, wherein said source-coupled input transistor pair is two substantially identical transistors connected in parallel to each other.

6. The VCO of claim 1, wherein said pair of load resistors are substantially identical to each other.

7. The VCO of claim 1, wherein said current-steering transistor pair is two substantially identical transistors cross-coupled to each other.