Parallel graphics rendering system supporting parallelized operation of multiple graphics processing pipelines within diverse system architectures

• US 20080129748A1
• Filed: 10/30/2007
• Published: 06/05/2008
• Est. Priority Date: 11/19/2003
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Lucid Information Technology, Ltd.
• Inventors: Bakalash, Reuven, Leviathan, Yaniv
• Granted Patent: US 8,134,563 B2
• Time in Patent Office: Days
• US Class Current: 345/505
• CPC Class Codes: G06F 9/5066 Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs mappping at compile time, see G06F8/451
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 2210/52 Parallel processing

Abstract

A parallel graphics rendering system is embodied within a host computing system and includes a plurality of graphic processing pipelines (GPPLs) and graphics processing modules. The parallel graphics rendering system supports one or more modes of parallel operation selected from the group consisting of object division, image division, and time division. a plurality of graphic processing pipelines The GPPLs support a parallel graphics rendering process that employs one or more of the object division, image division and/or time division modes of parallel operation in order to execute graphic commands and process graphics data, and render pixel-composited images containing graphics for display on a display device during the run-time of the graphics-based application. An automatic mode control module automatically controls the mode of parallel operation of the parallel graphics rendering system during the run-time of the graphics-based application. The graphics processing modules of the parallel graphics rendering system can be embodied within diverse system architectures.

Claims

1. A parallel graphics rendering system embodied within a host computing system having (i) host memory space for storing one or more graphics-based applications and a graphics library for generating graphics commands and data during the run-time of the graphics-based application, (ii) one or more CPUs for executing said graphics-based applications, and (iii) a display device for displaying images containing graphics during the execution of said graphics-based applications, said MMPGRS comprising:

a multi-mode parallel graphics rendering subsystem supporting multiple modes of parallel operation selected from the group consisting of object division, image division, and time division;

a plurality of graphic processing pipelines (GPPLs) supporting a parallel graphics rendering process that employs one or more of said object division, image division and/or time division modes of parallel operation in order to execute graphic commands and process graphics data (GCAD), and render pixel-composited images containing graphics for display on a display device during the run-time of said graphics-based application; and

an automatic mode control module for automatically controlling the mode of parallel operation of said parallel graphics rendering system during the run-time of said graphics-based application.

2. The parallel graphics rendering system of claim 1, wherein each mode of parallel operation includes at least three stages, namely, decomposition, distribution and recomposition, and wherein said multi-mode parallel graphics rendering subsystem comprises:

a decomposition module for supporting the decomposition stage of parallel operation;

a distribution module for supporting the distribution stage of parallel operation; and

a recomposition module for supporting the recomposition stage of parallel operation; and

wherein said decomposition, distribution and recomposition modules cooperate to carry out the decomposition, distribution and recomposition stages, respectively, of the different modes of parallel operation supported on said MMPGRS.

3. The parallel graphics rendering system of claim 1, wherein only one of said GPPLs is designated as the primary GPPL and is responsible for driving said display unit with a final pixel image composited within a frame buffer (FB) maintained by said primary GPPL, and all other GPPLs function as secondary GPPLs, supporting the pixel image recompositing process.

4. The parallel graphics rendering system of claim 2, wherein said decomposition module divides up the stream of graphic commands and data according to the required mode of parallel operation determined by said automatic mode control module;

wherein said distribution module physically distributes the streams of graphics commands and data to said plurality of GPPLs;

wherein said GPPLs execute said graphics commands using said graphics data and generate partial pixel data sets associated with frames of images to be composited, within the frame buffer, by the primary GPPL in said MMPGRS; and

wherein said recomposition module merges together the partial pixel data sets from produced from said GPPLs, according to mode of parallel operation at any instant in time, and producing a final pixel data set within the frame buffer of the primary GPPL, which is sent into said display device for display.

9. The parallel graphics rendering system of claim 1, wherein said display unit is a device selected from the group consisting of an flat-type display panel, a projection-type display panel, and other image display devices.

10. The parallel graphics rendering system of claim 1, wherein said host computing system is a machine selected from the group consisting of a PC-level computer, information server, laptop, game console system, portable computing system, and any computational-based machine supporting the real-time generation and display of 3D graphics.

11. The parallel graphics rendering system of claim 1, wherein said distribution module and recomposition modules are implemented within a hardware-based graphics hub device having router fabric, and wherein said distribution module comprises:

(i) a distribution management module, for activating said router fabric to transfer graphic commands and data to said GPPLs. according to needs of the modes of parallel operation instantiated by said parallel graphics rendering system;

(iii) a profiler module providing an additional source of performance data, beyond said GPPLs, vendor'"'"'s drivers, and chipsets; and

(iv) a hub control module, operating under control of said automatic mode control module, for configuring said router fabric according to the various modes of parallel operation and to coordinate the overall functioning of hardware components within said distribution module across said graphics hub device.

12. The parallel graphics rendering system of claim 11, wherein said router fabric serves to (i) transfer graphic commands and data from said CPU to said GPPLs, (ii) transfer raster data from said GPPLs to said recomposition module, (iii) transfer raster data among said GPPLs for an alternative GPPL-based recomposition, and (iv) conduct other communication tasks, such as profiling data, and control, among the various system components.

13. The parallel graphics rendering system of claim 12, wherein said router fabric receives upstream of graphic commands and data from said CPU, and transfers said graphic commands and data downstream to said GPPLs, under the control of said distribution management module, following the data division scheme generated by a division control module according to current mode of parallel operation.

14. The parallel graphics rendering system of claim 13, wherein said profiler in said distribution module has several functions within said graphics hub device, namely:

(i) to deliver profiling data to said division control module;

(ii) to forward said profiling data from said GPPLs to said division control module; and

(iii) to forward profiling data from the pre-GPPL side of said graphics hub device to said division control module within said decomposition module.

15. The parallel graphics rendering system of claim 14, wherein said profiler monitors a stream of graphics commands and data, by monitoring polygons, commands, and texture count and quantifying data structures and their volumes for load balance purposes.

16. The parallel graphics rendering system of claim 11, wherein said hub control module, operates under control of the said automatic mode control module, and configures said router fabric according to the various of parallel operation and to coordinates the overall functioning of hardware components across said distribution module within said graphics hub device.

17. The parallel graphics rendering system of claim 16, wherein the primary function of said recomposition module is to merge together, the partial results of multiple GPPLs, according to parallelization mode that is operative at any instant in time, and the resulting or final frame buffer (FB) is sent to said display device (via primary said GPPL, or directly under said automatic mode control module.

18. The parallel graphics rendering system of claim 17, wherein said recomposition module comprises:

(i) a merge management module for handling the reading frame buffers;

(ii) a merger module for performing compositing algorithms;

(iii) a profiler module for collecting an additional source of performance data, beyond the GPPL vendor'"'"'s driver, and chipset; and

(iv) a hub control module, operating under control of said automatic mode control module, for configuring said router fabric according to the various modes of parallel operation, and coordinating the overall functioning of hardware components within said recomposition module across said graphics hub device.

19. The parallel graphics rendering system of claim 18, wherein said router fabric comprises a configurable switch providing at least upstream path between said graphics hub device and said CPU, and at least one downstream path between said graphics hub device and said GPPLs.

20. The parallel graphics rendering system of claim 18, wherein under the local control of said merge management module and said hub control module, said router fabric performs the following functions:

(i) transferring read-back FB raster data from said GPPLs to said merger module and returning composited image to said primary GPPL, all under orchestration of said merge management module;

(ii) transferring the read-back FB raster data among said GPPLs for GPPL-based recomposition, so that the finally recomposited pixel data in final image is composited in said primary GPPL;

(iii) transferring additional data, e.g. profile data, to said decomposition module; and

(iv) transferring control commands across said parallel graphics rendering system.

21. The parallel graphics rendering system of claim 18, wherein within said recomposition module, said profiler module has several functions namely:

(i) monitors the stream of graphics commands and data within said graphics hub device;

(ii) delivering profiling data to said automatic mode control module;

(iii) forwarding said profiling data from said GPUs to said automatic mode control module; and

(iv) forwarding post-GPU profiling data to said automatic mode control module within the decomposition module.

22. The parallel graphics rendering system of claim 21, wherein said profiler module within said recomposition module further performs:

(v) profiling of the merge process and monitoring of the task completion of each GPU for load balancing purposes.

23. The parallel graphics rendering system of claim 18, wherein said hub control modules provided within said distribution and recomposition modules are realized as a single device or unit, on the same piece of silicon or like semiconductor material.

24. The parallel graphics rendering system of claim 11, wherein said automatic mode control module, said decomposition module, said distribution module and said recomposition module are implemented as a software package within said host memory space, and wherein said GGPLs include at least two GPUs supported on external graphics cards.

25. The parallel graphics rendering system of claim 11, wherein said automatic mode control module and said decomposition module are implemented as a software package within said host memory space, while said distribution and recomposition modules are implemented in a hardware-based graphics hub device, and wherein said GGPLs include at least two GPUs supported on external graphics cards connected to said CPU via said graphics hub device and a bridge circuit;

and wherein said display device is connected to said graphics hub device.

26. The parallel graphics rendering system of claim 11, wherein said automatic mode control module and said decomposition module are implemented as a software package within said host memory space, while said distribution and recomposition modules are implemented in a hardware-based graphics hub devices supporting said GGPLs.

27. The parallel graphics rendering system of claim 26, wherein said graphics hub device is implemented as a single SOC-based graphics chip on a single graphics card to which said graphics device is connected.

28. The parallel graphics rendering system of claim 11, wherein said automatic mode control module and said decomposition module are implemented as a software package within said host memory space, while said distribution and recomposition modules are implemented in a graphics hub device within an integrated graphics device (IGD) supporting a GPU, and wherein said GGPLs include at least one GPU on external graphics card connected to said CPU via said IGD and a bridge circuit.

29. The parallel graphics rendering system of claim 11, wherein said automatic mode control module and said decomposing module are implemented as a software package within said host memory space, while said distribution and recomposition modules are implemented as a graphics hub device within an integrated graphics device (IGD), and wherein said GGPLs include multiple graphics cards, each supporting at least one GPU, and being connected to said IGD, while said display device is connected to said IGD.

30. The parallel graphics rendering system of claim 1, in combination with said host computing system.

5. The parallel graphics rendering system of 4, wherein each of said decomposition, distribution and recomposition modules is induced into a sub-state by setting parameters, and the mode (i.e. state) of parallel operation of said MMPGRS is established by the combination of such sub-states;

and

wherein said automatic mode control module controls the substates of said decomposition, distribution and recomposition modules, and inter-state transitions thereof.

6. The parallel graphics rendering system of claim 5, wherein said decomposition module can be set to different decomposing sub-states selected from the group consisting of object decomposition, image decomposition, alternate decomposition, and single GPPL for the object division, image division, time division and single GPPL (non parallel) modes of operation, respectively.

7. The parallel graphics rendering system of claim 5, wherein said distribution module can be set to different distributing sub-states selected from the group consisting of divide and broadcast sub-state for object division and image division modes of operation, and single GPPL sub-state for the time division and single GPPL (i.e. non parallel system) mode of operation.

8. The parallel graphics rendering system of claim 5, wherein said recomposition module can be set to different sub-states selected from the group consisting of (i) test based sub-state which carries out re-composition based on predefined test performed on pixels of partial frame buffers (typically these are depth test, stencil test, or combination thereof), (ii) screen based sub-state combines together parts of the final frame buffers, and (iii) the None mode which makes no merges, just moves one of the pipeline frame buffers to the display device, as required in time division parallelism or in single GPU (non parallel).