LOAD DUMP PROTECTION FOR POWER FET DEVICE

• US 20080130178A1
• Filed: 12/03/2007
• Published: 06/05/2008
• Est. Priority Date: 12/04/2006
• Status: Active Grant

• Current Assignee: Magna Electronics Incorporated (Magna International Incorporated)
• Original Assignee: Magna Electronics Incorporated (Magna International Incorporated)
• Inventors: Williams, W. David, Gega, Andi, Wichlacz, John T.
• Granted Patent: US 7,864,496 B2
• Time in Patent Office: Days
• US Class Current: 361/33
• CPC Class Codes: H02H 7/0833 for electric motors with control arrangements
• CPC Class Codes: H02H 9/047 Free-wheeling circuits

Abstract

A load dump protection system is operable to provide protection for power transistors used to drive a blower motor of a vehicle. The load dump protection system includes circuitry for detecting an over-voltage transient. The circuitry adjusts a drive transistor into a saturation mode in response to a detection of an over-voltage transient. The circuitry lowers the power dissipated by the drive transistor when the drive transistor is in the saturation mode.

Claims

1. A load dump protection system operable to provide protection for power transistors used to drive a blower motor of a vehicle, said load dump protection system comprising:

circuitry for detecting an over-voltage transient, said circuitry adjusting a drive transistor into a saturation mode in response to a detection of an over-voltage transient, said circuitry lowering the power dissipated by the drive transistor when said drive transistor is in said saturation mode.

2. The load dump protection system of claim 1, wherein said circuitry is capable of detecting an atypically large voltage at a battery connection.

3. The load dump protection system of claim 1, wherein said circuitry comprises a sense circuit and a drive circuit, said sense circuit detecting an over-voltage transient and said drive circuit adjusting said drive transistor in response to said sense circuit.

4. The load dump protection system of claim 1, wherein said circuitry adjusts said drive transistor to said saturation mode when said drive transistor is operating, and wherein said circuitry does not adjust said drive transistor to said saturation mode when said drive transistor is not operating.

5. The load dump protection system of claim 1, wherein said circuitry comprises a comparator that compares an incoming battery voltage to a high voltage threshold and said circuitry adjusts said drive transistor to said saturation mode in response to an output of said comparator when the battery voltage is greater than said high voltage threshold.

6. The load dump protection system of claim 5, wherein said circuitry adjusts an op-amp circuit to apply a maximum voltage to a gate of said drive transistor to adjust said drive transistor to said saturation mode.

7. The load dump protection system of claim 6, wherein said circuitry is operable to override said op-amp circuit and maintain said drive transistor in an off mode when said drive transistor is not operating and when said the incoming battery voltage is greater than said high voltage threshold.