Permute Unit and Method to Operate a Permute Unit
First Claim
1. A permute unit comprising:
- a permute logic and a crossbar working in cycles defined by clocking signals and generating one valid output vector (vo) per cycle by treating two parallel input vectors (va, vb) per cycle according to an adequate scheme, wherein the permute unit is double pumped by performing two inner cycles per outer cycle defined by the clocking signals, wherein in every first inner cycle first halves (va<
0;
63>
, vb<
0;
63>
) of both input vectors (va, vb) are treated and in every second inner cycle second halves (va<
64;
127>
, vb<
64;
127>
) of both input vectors (va, vb) are treated and wherein every second inner cycle a valid output vector (vo) is generated from the results of the treatments within the first and the second inner cycles.
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Abstract
A permute unit is described comprising a permute logic and a crossbar working in cycles defined by clocking signals and generating one valid output vector per cycle by treating two parallel input vectors per cycle according to an adequate scheme, wherein the permute unit is double pumped by performing two inner cycles per outer cycle defined by the clocking signals, wherein in every first inner cycle first halves of both input vectors are treated and in every second inner cycle second halves of both input vectors are treated and wherein every second inner cycle a valid output vector is generated from the results of the treatments within the first and the second inner cycles. Furthermore a method is described to operate such a permute unit.
-
Citations
9 Claims
-
1. A permute unit comprising:
- a permute logic and a crossbar working in cycles defined by clocking signals and generating one valid output vector (vo) per cycle by treating two parallel input vectors (va, vb) per cycle according to an adequate scheme, wherein the permute unit is double pumped by performing two inner cycles per outer cycle defined by the clocking signals, wherein in every first inner cycle first halves (va<
0;
63>
, vb<
0;
63>
) of both input vectors (va, vb) are treated and in every second inner cycle second halves (va<
64;
127>
, vb<
64;
127>
) of both input vectors (va, vb) are treated and wherein every second inner cycle a valid output vector (vo) is generated from the results of the treatments within the first and the second inner cycles. - View Dependent Claims (2, 3, 4)
- a permute logic and a crossbar working in cycles defined by clocking signals and generating one valid output vector (vo) per cycle by treating two parallel input vectors (va, vb) per cycle according to an adequate scheme, wherein the permute unit is double pumped by performing two inner cycles per outer cycle defined by the clocking signals, wherein in every first inner cycle first halves (va<
- 5. The permute unit according 4, wherein the means for generating a valid output vector (vo) every second inner cycle comprise a feedback network that delays the result of the treatment of every first inner cycle by one inner cycle.
-
8. A method to operate a double pumped permute unit comprising the steps of
double pumping a permute unit by performing two inner cycles per outer cycle given by a clock signal, treating a first pair of first halves (va< - 0;
63>
, vb<
0;
63>
) of two parallel input vectors (va, vb) according to an adequate scheme in a first inner cycle,treating a second pair of second halves (va<
64;
127>
, vb<
64;
127>
) of two parallel input vectors (va, vb) according to an adequate scheme in a second inner cycle, wherein when treating the second pair (va<
64;
127>
, vb<
64;
127>
) the treatment of the first pair (va<
0;
63>
, vb<
0;
63>
) is considered,combining the results of the treatment of the first pair (va<
0;
63>
, vb<
0;
63>
) and the treatment of the second pair (va<
64;
127>
, vb<
64;
127>
) to a valid output vector (vo) every second inner cycle. - View Dependent Claims (9)
- 0;
Specification