MAXIMUM/VARIABLE SHIFTER WIDTHS TO ALLOW ALTERNATING PHASE-SHIFT IMPLEMENTATION FOR DENSE OR EXISTING LAYOUTS

• US 20080134128A1
• Filed: 11/30/2006
• Published: 06/05/2008
• Est. Priority Date: 11/30/2006
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: BLATCHFORD, James Walter, Vickery, Carl Albert
• Granted Patent: US 7,774,739 B2
• Time in Patent Office: Days
• US Class Current: 716/19
• CPC Class Codes: G03F 1/30 Alternating PSM, e.g. Levenson-Shibuya PSM; Preparation thereof

Abstract

In accordance with an embodiment of the invention, there is a method of designing a lithography mask. The method can comprise determining a maximum width of a shifter, wherein the maximum width corresponds to a width of a shifter for a first set of features and determining whether the shifter having the maximum width can be placed in a shifter space for a second set of features. The method can also comprise incrementally decreasing the width of the shifter to be placed into the shifter space for the second set of features when the shifter having the maximum width cannot be placed in the shifter space for a feature in the second set of features until an acceptable shifter width can be determined or until the shifter width is reduced to a predetermined minimum shifter width.

Claims

1. A method of designing a lithography mask, the method comprising:

determining a maximum width of a shifter, wherein the maximum width corresponds to a width of a shifter for a first set of features;

determining whether the shifter having the maximum width can be placed in a shifter space for a second set of features; and

incrementally decreasing the width of the shifter to be placed into the shifter space for the second set of features when the shifter having the maximum width cannot be placed in the shifter space for a feature in the second set of features until an acceptable shifter width can be determined or until the shifter width is reduced to a predetermined minimum shifter width.

2. The method of designing a lithography mask according to claim 1, wherein the first set of features are contact-pitch features.

3. The method of designing a lithography mask according to claim 2, wherein the second set of features are isolated lines.

4. The method of designing a lithography mask according to claim 1 further comprising:

flagging as a design rule violation the shifter space for which a shifter cannot be placed.

5. The method of designing a lithography mask according to claim 1, wherein the features in the second set of features are perpendicular to each other.

6. The method of designing a lithography mask according to claim 1, wherein the shifters do not merge to form a single shifter.

7. A semiconductor device made according to the method of claim 1.

8. A method of designing a lithography mask, the method comprising:

determining a first shifter width based on a shifter space associated with a critical dimension feature;

attempting to place a shifter having the first shifter width in a shifter space other than the shifter space associated with the critical dimension feature; and

reducing a width of a shifter having the first shifter width when the width of the shifter having the first shifter width is larger than an allowed shifter width until the width of the shifter is allowed or until the width of the shifter is less than a minimum shifter width.

9. The method of designing a lithography mask according to claim 8, wherein the critical dimension features are contact-pitch features.

10. The method of designing a lithography mask according to claim 9, wherein the shifter space other than the shifter space associated with the critical dimension feature is associated with an isolated line.

11. The method of designing a lithography mask according to claim 8, wherein the minimum shifter width is not greater than 110 nm.

12. The method of designing a lithography mask according to claim 8, wherein the shifter space other than the shifter space associated with the critical dimension is associated with a gate.

13. The method of designing a lithography mask according to claim 8 wherein the step of reducing the width of a shifter further comprises:

reducing the size iteratively until the width of the shifter is allowed or until the width of the shifter is less than a minimum shifter width.

14. The method of designing a lithography mask according to claim 13 further comprising:

flagging as a design rule violation the shifter space for which the width of the is less than the minimum shifter width.

15. A semiconductor device formed according to the method of claim 8.

16. A computer readable medium comprising program code that configures a processor to perform a method of correcting a lithography mask comprising:

program code for determining a maximum width of a shifter, wherein the maximum width corresponds to a width of a shifter for a first set of features;

program code for determining whether the shifter having the maximum width can be placed in a shifter space for a second set of features; and

program code for incrementally decreasing the width of the shifter to be placed into the shifter space for the second set of features when the shifter having the maximum width cannot be placed in the shifter space for a feature in the second set of features until an acceptable shifter width can be determined or until the shifter width is reduced to a predetermined minimum shifter width.

17. The computer readable medium comprising program code according to claim 16, wherein the first set of features are contact-pitch features.

18. The computer readable medium comprising program code according to claim 16, wherein the second set of features are isolated lines.

19. The computer readable medium comprising program code according to claim 16 further comprising:

flagging as a design rule violation the shifter space for which a shifter cannot be placed.

20. The computer readable medium comprising program code according to claim 16, wherein the features in the second set of features are perpendicular to each other.

21. The computer readable medium comprising program code according to claim 16, wherein the shifters do not merge to form a single shifter.